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yuchi.chen@intel.com has posted comments on this change by yuchi.chen@intel.com. ( https://review.coreboot.org/c/coreboot/+/83314?usp=email )
Change subject: soc/intel/common: add CPU and PCIe IDs for Snow Ridge platform
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Patch Set 5:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83314/comment/cdd56ecf_27d2e091?usp... :
PS3, Line 8:
Please add the source for these ids, like datasheet name, revision.
These IDs are described in the EDS file of Snow Ridge SoC, I've added it in the commit message.
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