[XS] Change in coreboot[main]: soc/intel/common/cnvi: Add PRW for CNVi device

[Nicholas Sudsgaard (Code Review)]

Attention is currently required from: Sean Rhodes.

Nicholas Sudsgaard has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84993?usp=email )

Change subject: soc/intel/common/cnvi: Add PRW for CNVi device
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Patch Set 2:

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/84993/comment/8a6fd1be_54f26b75?usp... :
PS2, Line 7: PRW
_PRW

https://review.coreboot.org/c/coreboot/+/84993/comment/8dec8a78_23357a12?usp... :
PS2, Line 9: PRW
_PRW

File src/soc/intel/common/block/cnvi/cnvi.c:

https://review.coreboot.org/c/coreboot/+/84993/comment/d7704843_69de318d?usp... :
PS2, Line 103: Method(_PRW, 0)
             :  *	{
             :  *		Return (GPRW(0x6D, 4))
             :  *	}
This does not look like what the acpigen would generate to me.