Change in coreboot[master]: soc/amd/picasso,mb/google/zork: Remove invalid UPWS variable
Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43424 )
Change subject: soc/amd/picasso,mb/google/zork: Remove invalid UPWS variable ......................................................................
soc/amd/picasso,mb/google/zork: Remove invalid UPWS variable
PMx0EE is not defined in the Picasso PPR.
BUG=b:153001807, b:154756391 TEST=None
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I98caf0cd2d0bdcf19de2b945dcf74f5cf7354769 --- M src/mainboard/google/zork/variants/baseboard/include/baseboard/acpi/sleep.asl M src/soc/amd/picasso/acpi/pcie.asl 2 files changed, 0 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/43424/1
diff --git a/src/mainboard/google/zork/variants/baseboard/include/baseboard/acpi/sleep.asl b/src/mainboard/google/zork/variants/baseboard/include/baseboard/acpi/sleep.asl index a5f2490..3061596 100644 --- a/src/mainboard/google/zork/variants/baseboard/include/baseboard/acpi/sleep.asl +++ b/src/mainboard/google/zork/variants/baseboard/include/baseboard/acpi/sleep.asl @@ -23,7 +23,6 @@ /* DBGO("\n") */
Store(0, PEWD) - Store(7, UPWS) } /* End Method(_PTS) */
/* diff --git a/src/soc/amd/picasso/acpi/pcie.asl b/src/soc/amd/picasso/acpi/pcie.asl index 954c5365..c11e63d 100644 --- a/src/soc/amd/picasso/acpi/pcie.asl +++ b/src/soc/amd/picasso/acpi/pcie.asl @@ -122,8 +122,6 @@ IndexField (PIOI, PIOD, ByteAcc, NoLock, Preserve) { Offset(0x60), /* AcpiPm1EvgBlk */ P1EB, 16, - Offset(0xee), - UPWS, 3, } OperationRegion (P1E0, SystemIO, P1EB, 0x04) Field (P1E0, ByteAcc, Nolock, Preserve) {
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43424 )
Change subject: soc/amd/picasso,mb/google/zork: Remove invalid UPWS variable ......................................................................
Patch Set 1:
mandolin failure:
dsdt.asl 266: Store(7, UPWS) Error 6084 - ^ Object does not exist (UPWS)
Hello build bot (Jenkins), Furquan Shaikh, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43424
to look at the new patch set (#2).
Change subject: soc/amd/picasso,mb/{zork,mandolin}: Remove invalid UPWS variable ......................................................................
soc/amd/picasso,mb/{zork,mandolin}: Remove invalid UPWS variable
PMx0EE is not defined in the Picasso PPR.
BUG=b:153001807, b:154756391 TEST=None
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I98caf0cd2d0bdcf19de2b945dcf74f5cf7354769 --- M src/mainboard/amd/mandolin/acpi/sleep.asl M src/mainboard/google/zork/variants/baseboard/include/baseboard/acpi/sleep.asl M src/soc/amd/picasso/acpi/pcie.asl 3 files changed, 0 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/43424/2
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43424 )
Change subject: soc/amd/picasso,mb/{zork,mandolin}: Remove invalid UPWS variable ......................................................................
Patch Set 2: Code-Review+2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43424 )
Change subject: soc/amd/picasso,mb/{zork,mandolin}: Remove invalid UPWS variable ......................................................................
Patch Set 2: Code-Review+2
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43424 )
Change subject: soc/amd/picasso,mb/{zork,mandolin}: Remove invalid UPWS variable ......................................................................
soc/amd/picasso,mb/{zork,mandolin}: Remove invalid UPWS variable
PMx0EE is not defined in the Picasso PPR.
BUG=b:153001807, b:154756391 TEST=None
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I98caf0cd2d0bdcf19de2b945dcf74f5cf7354769 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43424 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Aaron Durbin adurbin@chromium.org Reviewed-by: Furquan Shaikh furquan@google.com --- M src/mainboard/amd/mandolin/acpi/sleep.asl M src/mainboard/google/zork/variants/baseboard/include/baseboard/acpi/sleep.asl M src/soc/amd/picasso/acpi/pcie.asl 3 files changed, 0 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Aaron Durbin: Looks good to me, approved Furquan Shaikh: Looks good to me, approved
diff --git a/src/mainboard/amd/mandolin/acpi/sleep.asl b/src/mainboard/amd/mandolin/acpi/sleep.asl index db81e4a..6fdb30b 100644 --- a/src/mainboard/amd/mandolin/acpi/sleep.asl +++ b/src/mainboard/amd/mandolin/acpi/sleep.asl @@ -23,7 +23,6 @@ /* DBGO("\n") */
Store(0, PEWD) - Store(7, UPWS) } /* End Method(_PTS) */
/* diff --git a/src/mainboard/google/zork/variants/baseboard/include/baseboard/acpi/sleep.asl b/src/mainboard/google/zork/variants/baseboard/include/baseboard/acpi/sleep.asl index c5cd203..267be30 100644 --- a/src/mainboard/google/zork/variants/baseboard/include/baseboard/acpi/sleep.asl +++ b/src/mainboard/google/zork/variants/baseboard/include/baseboard/acpi/sleep.asl @@ -23,7 +23,6 @@ /* DBGO("\n") */
Store(0, PEWD) - Store(7, UPWS) } /* End Method(_PTS) */
/* diff --git a/src/soc/amd/picasso/acpi/pcie.asl b/src/soc/amd/picasso/acpi/pcie.asl index e880267..cb4be7f 100644 --- a/src/soc/amd/picasso/acpi/pcie.asl +++ b/src/soc/amd/picasso/acpi/pcie.asl @@ -74,8 +74,6 @@ IndexField (PIOI, PIOD, ByteAcc, NoLock, Preserve) { Offset(0x60), /* AcpiPm1EvgBlk */ P1EB, 16, - Offset(0xee), - UPWS, 3, } OperationRegion (P1E0, SystemIO, P1EB, 0x04) Field (P1E0, ByteAcc, Nolock, Preserve) {
-
Aaron Durbin (Code Review) -
Felix Held (Code Review)
-
Furquan Shaikh (Code Review)
-
Raul Rangel (Code Review)