Meera Ravindranath has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43761 )
Change subject: mb/google/dedede: Remove Rcomp resistor and target values ......................................................................
mb/google/dedede: Remove Rcomp resistor and target values
MRC automatically detects the DDR type and sets Rcomp resistor and target values for JSL and does not require explicit programming.
Change-Id: Ia130765e2cb91d6a39ad00ebbab20e7e87fa42d1 Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com --- M src/mainboard/google/dedede/variants/baseboard/memory.c 1 file changed, 0 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/43761/1
diff --git a/src/mainboard/google/dedede/variants/baseboard/memory.c b/src/mainboard/google/dedede/variants/baseboard/memory.c index dc43ea5..aa52636 100644 --- a/src/mainboard/google/dedede/variants/baseboard/memory.c +++ b/src/mainboard/google/dedede/variants/baseboard/memory.c @@ -36,12 +36,6 @@ .dqs_map[DDR_CH0] = {1, 3, 0, 2, 7, 5, 4, 6}, .dqs_map[DDR_CH1] = {3, 1, 2, 0, 4, 5, 7, 6},
- /* WaddleDoo uses 100, 100 and 100 rcomp resistors */ - .rcomp_resistor = {100, 100, 100}, - - /* WaddleDoo Rcomp target values */ - .rcomp_targets = {80, 40, 40, 40, 30}, - /* Disable Early Command Training */ .ect = 1,
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43761 )
Change subject: mb/google/dedede: Remove Rcomp resistor and target values ......................................................................
Patch Set 1: Code-Review+2
The Rcomp resistor values are fixed as per platform design guidelines, right? If so, it makes sense to automatically determine the correct values.
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43761 )
Change subject: mb/google/dedede: Remove Rcomp resistor and target values ......................................................................
mb/google/dedede: Remove Rcomp resistor and target values
MRC automatically detects the DDR type and sets Rcomp resistor and target values for JSL and does not require explicit programming.
Change-Id: Ia130765e2cb91d6a39ad00ebbab20e7e87fa42d1 Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/43761 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/google/dedede/variants/baseboard/memory.c 1 file changed, 0 insertions(+), 6 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/google/dedede/variants/baseboard/memory.c b/src/mainboard/google/dedede/variants/baseboard/memory.c index dc43ea5..aa52636 100644 --- a/src/mainboard/google/dedede/variants/baseboard/memory.c +++ b/src/mainboard/google/dedede/variants/baseboard/memory.c @@ -36,12 +36,6 @@ .dqs_map[DDR_CH0] = {1, 3, 0, 2, 7, 5, 4, 6}, .dqs_map[DDR_CH1] = {3, 1, 2, 0, 4, 5, 7, 6},
- /* WaddleDoo uses 100, 100 and 100 rcomp resistors */ - .rcomp_resistor = {100, 100, 100}, - - /* WaddleDoo Rcomp target values */ - .rcomp_targets = {80, 40, 40, 40, 30}, - /* Disable Early Command Training */ .ect = 1,
-
Angel Pons (Code Review) -
Meera Ravindranath (Code Review)
-
Patrick Georgi (Code Review)