Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/20015
Change subject: soc/intel/skylake: Use PCI IDs from device/pci_ids.h ......................................................................
soc/intel/skylake: Use PCI IDs from device/pci_ids.h
Remove PCI IDs inclusion from soc header rather referring those from device/pci_ids.h.
Change-Id: I490da3e336fb6f8194d5fba800132f550ed5ab37 Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/skylake/bootblock/report_platform.c M src/soc/intel/skylake/igd.c M src/soc/intel/skylake/include/soc/pch.h M src/soc/intel/skylake/include/soc/systemagent.h M src/soc/intel/skylake/lpc.c M src/soc/intel/skylake/systemagent.c 6 files changed, 74 insertions(+), 104 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/20015/1
diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c index c50a6dd..314afbf 100644 --- a/src/soc/intel/skylake/bootblock/report_platform.c +++ b/src/soc/intel/skylake/bootblock/report_platform.c @@ -19,6 +19,7 @@ #include <console/console.h> #include <cpu/x86/msr.h> #include <device/pci.h> +#include <device/pci_ids.h> #include <soc/bootblock.h> #include <soc/cpu.h> #include <soc/pch.h> @@ -30,62 +31,66 @@ u32 cpuid; const char *name; } cpu_table[] = { - { CPUID_SKYLAKE_C0, "Skylake C0" }, - { CPUID_SKYLAKE_D0, "Skylake D0" }, - { CPUID_SKYLAKE_HQ0, "Skylake H Q0" }, - { CPUID_SKYLAKE_HR0, "Skylake H R0" }, - { CPUID_KABYLAKE_G0, "Kabylake G0" }, - { CPUID_KABYLAKE_H0, "Kabylake H0" }, - { CPUID_KABYLAKE_Y0, "Kabylake Y0" }, - { CPUID_KABYLAKE_HA0, "Kabylake H A0" }, - { CPUID_KABYLAKE_HB0, "Kabylake H B0" }, + { CPUID_SKYLAKE_C0, "Skylake C0" }, + { CPUID_SKYLAKE_D0, "Skylake D0" }, + { CPUID_SKYLAKE_HQ0, "Skylake H Q0" }, + { CPUID_SKYLAKE_HR0, "Skylake H R0" }, + { CPUID_KABYLAKE_G0, "Kabylake G0" }, + { CPUID_KABYLAKE_H0, "Kabylake H0" }, + { CPUID_KABYLAKE_Y0, "Kabylake Y0" }, + { CPUID_KABYLAKE_HA0, "Kabylake H A0" }, + { CPUID_KABYLAKE_HB0, "Kabylake H B0" }, };
static struct { u16 mchid; const char *name; } mch_table[] = { - { MCH_SKYLAKE_ID_U, "Skylake-U" }, - { MCH_SKYLAKE_ID_Y, "Skylake-Y" }, - { MCH_SKYLAKE_ID_ULX, "Skylake-ULX" }, - { MCH_SKYLAKE_ID_H, "Skylake-H" }, - { MCH_SKYLAKE_ID_H_EM, "Skylake-H Embedded" }, - { MCH_KABYLAKE_ID_U, "Kabylake-U" }, - { MCH_KABYLAKE_ID_U_R, "Kabylake-R ULT"}, - { MCH_KABYLAKE_ID_Y, "Kabylake-Y" }, - { MCH_KABYLAKE_ID_H, "Kabylake-H" }, + { PCI_DEVICE_ID_INTEL_SKL_ID_U, "Skylake-U" }, + { PCI_DEVICE_ID_INTEL_SKL_ID_Y, "Skylake-Y" }, + { PCI_DEVICE_ID_INTEL_SKL_ID_ULX, "Skylake-ULX" }, + { PCI_DEVICE_ID_INTEL_SKL_ID_H, "Skylake-H" }, + { PCI_DEVICE_ID_INTEL_SKL_ID_H_EM, "Skylake-H Embedded" }, + { PCI_DEVICE_ID_INTEL_KBL_ID_U, "Kabylake-U" }, + { PCI_DEVICE_ID_INTEL_KBL_U_R, "Kabylake-R ULT"}, + { PCI_DEVICE_ID_INTEL_KBL_ID_Y, "Kabylake-Y" }, + { PCI_DEVICE_ID_INTEL_KBL_ID_H, "Kabylake-H" }, };
static struct { u16 lpcid; const char *name; } pch_table[] = { - { PCH_SPT_LP_SAMPLE, "Skylake LP Sample" }, - { PCH_SPT_LP_U_BASE, "Skylake-U Base" }, - { PCH_SPT_LP_U_PREMIUM, "Skylake-U Premium" }, - { PCH_SPT_LP_Y_PREMIUM, "Skylake-Y Premium" }, - { PCH_SPT_H_PREMIUM, "Skylake-H Premium" }, - { PCH_SPT_H_C236, "Skylake-H C236" }, - { PCH_SPT_H_QM170, "Skylake-H QM170" }, - { PCH_KBL_LP_U_PREMIUM, "Kabylake-U Premium" }, - { PCH_KBL_LP_Y_PREMIUM, "Kabylake-Y Premium" }, - { PCH_KBL_LP_Y_PREMIUM_HDCP22, "Kabylake-Y iHDCP 2.2 Premium" }, + { PCI_DEVICE_ID_INTEL_SPT_LP_SAMPLE, "Skylake LP Sample" }, + { PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE, "Skylake-U Base" }, + { PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM, "Skylake-U Premium" }, + { PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM, "Skylake-Y Premium" }, + { PCI_DEVICE_ID_INTEL_KBP_H_PREMIUM, "Kabylake-H Premium" }, + { PCI_DEVICE_ID_INTEL_KBP_H_C236, "Kabylake-H C236" }, + { PCI_DEVICE_ID_INTEL_KBP_H_QM170, "Kabylake-H QM170" }, + { PCI_DEVICE_ID_INTEL_KBP_LP_U_PREMIUM, "Kabylake-U Premium" }, + { PCI_DEVICE_ID_INTEL_KBP_LP_Y_PREMIUM, "Kabylake-Y Premium" }, + { PCI_DEVICE_ID_INTEL_KBP_LP_SUPER_SKU, "Kabylake Super Sku" }, + { PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM_HDCP22, + "Kabylake-Y iHDCP 2.2 Premium" }, + { PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM_HDCP22, + "Kabylake-U iHDCP 2.2 Premium" }, };
static struct { u16 igdid; const char *name; } igd_table[] = { - { IGD_SKYLAKE_GT1_SULTM, "Skylake ULT GT1"}, - { IGD_SKYLAKE_GT2_SULXM, "Skylake ULX GT2" }, - { IGD_SKYLAKE_GT2_SULTM, "Skylake ULT GT2" }, - { IGD_SKYLAKE_GT2_SHALM, "Skylake HALO GT2" }, - { IGD_SKYLAKE_GT4_SHALM, "Skylake HALO GT4" }, - { IGD_KABYLAKE_GT1_SULTM, "Kabylake ULT GT1"}, - { IGD_KABYLAKE_GT2_SULXM, "Kabylake ULX GT2" }, - { IGD_KABYLAKE_GT2_SULTM, "Kabylake ULT GT2" }, - { IGD_KABYLAKE_GT2_SULTMR, "Kabylake-R ULT GT2"}, - { IGD_KABYLAKE_GT2_SHALM, "Kabylake HALO GT2" }, + { PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM, "Skylake ULT GT1"}, + { PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM, "Skylake ULX GT2" }, + { PCI_DEVICE_ID_INTEL_SKL_GT2_SULTM, "Skylake ULT GT2" }, + { PCI_DEVICE_ID_INTEL_SKL_GT2_SHALM, "Skylake HALO GT2" }, + { PCI_DEVICE_ID_INTEL_SKL_GT4_SHALM, "Skylake HALO GT4" }, + { PCI_DEVICE_ID_INTEL_KBL_GT1_SULTM, "Kabylake ULT GT1"}, + { PCI_DEVICE_ID_INTEL_KBL_GT2_SULXM, "Kabylake ULX GT2" }, + { PCI_DEVICE_ID_INTEL_KBL_GT2_SULTM, "Kabylake ULT GT2" }, + { PCI_DEVICE_ID_INTEL_KBL_GT2_SULTMR, "Kabylake-R ULT GT2"}, + { PCI_DEVICE_ID_INTEL_KBL_GT2_SHALM, "Kabylake HALO GT2" }, };
static void report_cpu_info(void) diff --git a/src/soc/intel/skylake/igd.c b/src/soc/intel/skylake/igd.c index 2d0187f..7aa8db7 100644 --- a/src/soc/intel/skylake/igd.c +++ b/src/soc/intel/skylake/igd.c @@ -187,16 +187,16 @@ };
static const unsigned short pci_device_ids[] = { - IGD_SKYLAKE_GT1_SULTM, - IGD_SKYLAKE_GT2_SULXM, - IGD_SKYLAKE_GT2_SULTM, - IGD_SKYLAKE_GT2_SHALM, - IGD_SKYLAKE_GT4_SHALM, - IGD_KABYLAKE_GT1_SULTM, - IGD_KABYLAKE_GT2_SULXM, - IGD_KABYLAKE_GT2_SULTM, - IGD_KABYLAKE_GT2_SULTMR, - IGD_KABYLAKE_GT2_SHALM, + PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM, + PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM, + PCI_DEVICE_ID_INTEL_SKL_GT2_SULTM, + PCI_DEVICE_ID_INTEL_SKL_GT2_SHALM, + PCI_DEVICE_ID_INTEL_SKL_GT4_SHALM, + PCI_DEVICE_ID_INTEL_KBL_GT1_SULTM, + PCI_DEVICE_ID_INTEL_KBL_GT2_SULXM, + PCI_DEVICE_ID_INTEL_KBL_GT2_SULTM, + PCI_DEVICE_ID_INTEL_KBL_GT2_SULTMR, + PCI_DEVICE_ID_INTEL_KBL_GT2_SHALM, 0, };
diff --git a/src/soc/intel/skylake/include/soc/pch.h b/src/soc/intel/skylake/include/soc/pch.h index 9602f10..800e0de 100644 --- a/src/soc/intel/skylake/include/soc/pch.h +++ b/src/soc/intel/skylake/include/soc/pch.h @@ -21,20 +21,6 @@ #include <device/device.h> #include <rules.h>
-/* PCH (SunRisePoint LP) */ -#define PCH_SPT_LP_SAMPLE 0x9d41 -#define PCH_SPT_LP_U_BASE 0x9d43 -#define PCH_SPT_LP_U_PREMIUM 0x9d48 -#define PCH_SPT_LP_Y_PREMIUM 0x9d46 -#define PCH_SPT_H_C236 0xa150 -#define PCH_SPT_H_PREMIUM 0xa14e -#define PCH_SPT_H_QM170 0xa14d -#define PCH_KBL_LP_Y_PREMIUM_HDCP22 0x9d4b -#define PCH_KBL_LP_U_PREMIUM_HDCP22 0x9d4e -#define PCH_LP_SUPER_SKU 0x9d51 -#define PCH_KBL_LP_U_PREMIUM 0x9d58 -#define PCH_KBL_LP_Y_PREMIUM 0x9d56 - u8 pch_revision(void); u16 pch_type(void); void pch_log_state(void); diff --git a/src/soc/intel/skylake/include/soc/systemagent.h b/src/soc/intel/skylake/include/soc/systemagent.h index 4b26387..012a875 100644 --- a/src/soc/intel/skylake/include/soc/systemagent.h +++ b/src/soc/intel/skylake/include/soc/systemagent.h @@ -23,27 +23,6 @@
#define SA_IGD_OPROM_VENDEV 0x80860406
-#define IGD_SKYLAKE_GT1_SULTM 0x1906 -#define IGD_SKYLAKE_GT2_SULXM 0x191E -#define IGD_SKYLAKE_GT2_SULTM 0x1916 -#define IGD_SKYLAKE_GT2_SHALM 0x191B -#define IGD_SKYLAKE_GT4_SHALM 0x193D -#define IGD_KABYLAKE_GT1_SULTM 0x5906 -#define IGD_KABYLAKE_GT2_SULXM 0x591E -#define IGD_KABYLAKE_GT2_SULTM 0x5916 -#define IGD_KABYLAKE_GT2_SULTMR 0x5917 -#define IGD_KABYLAKE_GT2_SHALM 0x591B - -#define MCH_SKYLAKE_ID_U 0x1904 -#define MCH_SKYLAKE_ID_Y 0x190c -#define MCH_SKYLAKE_ID_ULX 0x1924 -#define MCH_SKYLAKE_ID_H 0x1910 -#define MCH_SKYLAKE_ID_H_EM 0x1918 -#define MCH_KABYLAKE_ID_U 0x5904 -#define MCH_KABYLAKE_ID_Y 0x590c -#define MCH_KABYLAKE_ID_H 0x5910 -#define MCH_KABYLAKE_ID_U_R 0x5914 - /* Device 0:0.0 PCI configuration space */
#define EPBAR 0x40 diff --git a/src/soc/intel/skylake/lpc.c b/src/soc/intel/skylake/lpc.c index 3a6564c..6e7b197 100644 --- a/src/soc/intel/skylake/lpc.c +++ b/src/soc/intel/skylake/lpc.c @@ -316,18 +316,18 @@ };
static const unsigned short pci_device_ids[] = { - PCH_SPT_LP_SAMPLE, - PCH_SPT_LP_U_BASE, - PCH_SPT_LP_U_PREMIUM, - PCH_SPT_LP_Y_PREMIUM, - PCH_SPT_H_QM170, - PCH_SPT_H_PREMIUM, - PCH_SPT_H_C236, - PCH_KBL_LP_U_PREMIUM, - PCH_KBL_LP_Y_PREMIUM, - PCH_KBL_LP_Y_PREMIUM_HDCP22, - PCH_KBL_LP_U_PREMIUM_HDCP22, - PCH_LP_SUPER_SKU, + PCI_DEVICE_ID_INTEL_SPT_LP_SAMPLE, + PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE, + PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM, + PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM, + PCI_DEVICE_ID_INTEL_KBP_H_QM170, + PCI_DEVICE_ID_INTEL_KBP_H_PREMIUM, + PCI_DEVICE_ID_INTEL_KBP_H_C236, + PCI_DEVICE_ID_INTEL_KBP_LP_SUPER_SKU, + PCI_DEVICE_ID_INTEL_KBP_LP_U_PREMIUM, + PCI_DEVICE_ID_INTEL_KBP_LP_Y_PREMIUM, + PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM_HDCP22, + PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM_HDCP22, 0 };
diff --git a/src/soc/intel/skylake/systemagent.c b/src/soc/intel/skylake/systemagent.c index f15d26e..05603d1 100644 --- a/src/soc/intel/skylake/systemagent.c +++ b/src/soc/intel/skylake/systemagent.c @@ -411,15 +411,15 @@ };
static const unsigned short systemagent_ids[] = { - MCH_SKYLAKE_ID_U, - MCH_SKYLAKE_ID_Y, - MCH_SKYLAKE_ID_ULX, - MCH_SKYLAKE_ID_H, - MCH_SKYLAKE_ID_H_EM, - MCH_KABYLAKE_ID_U, - MCH_KABYLAKE_ID_U_R, - MCH_KABYLAKE_ID_Y, - MCH_KABYLAKE_ID_H, + PCI_DEVICE_ID_INTEL_SKL_ID_U, + PCI_DEVICE_ID_INTEL_SKL_ID_Y, + PCI_DEVICE_ID_INTEL_SKL_ID_ULX, + PCI_DEVICE_ID_INTEL_SKL_ID_H, + PCI_DEVICE_ID_INTEL_SKL_ID_H_EM, + PCI_DEVICE_ID_INTEL_KBL_ID_U, + PCI_DEVICE_ID_INTEL_KBL_ID_Y, + PCI_DEVICE_ID_INTEL_KBL_ID_H, + PCI_DEVICE_ID_INTEL_KBL_U_R, 0 };
-
Subrata Banik (Code Review)