New patch to review for coreboot: fb3c930 intel/nehalem: Add get_top_top_ram() in ramstage

[Kyösti Mälkki]

Kyösti Mälkki ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6030

-gerrit

commit fb3c930ef928ca68ff201598e0953cc4d39bc993
Author: Kyösti Mälkki 
Date:   Sun Jun 15 12:06:12 2014 +0300

intel/nehalem: Add get_top_top_ram() in ramstage

Needed to resolve CBMEM location early in ramstage. With DYNAMIC_CBMEM
    set_top_of_ram() will no longer be available.

Change-Id: If50f1c5455a587b096348ffedadbe1dd2350a714
    Signed-off-by: Kyösti Mälkki 
---
 src/northbridge/intel/nehalem/Makefile.inc |  2 ++
 src/northbridge/intel/nehalem/ram_calc.c   | 31 ++++++++++++++++++++++++++++++
 src/northbridge/intel/nehalem/raminit.c    |  9 ---------
 3 files changed, 33 insertions(+), 9 deletions(-)

diff --git a/src/northbridge/intel/nehalem/Makefile.inc b/src/northbridge/intel/nehalem/Makefile.inc
index 0115501..c6dcfd4 100644
--- a/src/northbridge/intel/nehalem/Makefile.inc
+++ b/src/northbridge/intel/nehalem/Makefile.inc
@@ -17,12 +17,14 @@
 # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 #

+ramstage-y += ram_calc.c
 ramstage-y += northbridge.c
 ramstage-y += gma.c

ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c
 ramstage-y += ../sandybridge/mrccache.c

+romstage-y += ram_calc.c
 romstage-y += raminit.c
 romstage-y += early_init.c
 romstage-y += ../sandybridge/mrccache.c
diff --git a/src/northbridge/intel/nehalem/ram_calc.c b/src/northbridge/intel/nehalem/ram_calc.c
new file mode 100644
index 0000000..db57a3d
--- /dev/null
+++ b/src/northbridge/intel/nehalem/ram_calc.c
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Vladimir Serbinenko.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#define __SIMPLE_DEVICE__
+
+#include <arch/io.h>
+#include <cbmem.h>
+#include "nehalem.h"
+
+unsigned long get_top_of_ram(void)
+{
+	/* Base of TSEG is top of usable DRAM */
+	u32 tom = pci_read_config32(PCI_DEV(0,0,0), TSEG);
+	return (unsigned long) tom;
+}
diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c
index 978ffbf..21cc987 100644
--- a/src/northbridge/intel/nehalem/raminit.c
+++ b/src/northbridge/intel/nehalem/raminit.c
@@ -4979,12 +4979,3 @@ void raminit(const int s3resume, const u8 *spd_addrmap)
    	save_timings(&info);
 #endif
 }
-
-#if REAL
-unsigned long get_top_of_ram(void)
-{
-	/* Base of TSEG is top of usable DRAM */
-	u32 tom = pci_read_config32(PCI_DEV(0, 0, 0), TSEG);
-	return (unsigned long)tom;
-}
-#endif