Attention is currently required from: Martin Roth, Arthur Heymans, Patrick Rudolph. Hello Arthur Heymans,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/56913
to review the following change.
Change subject: [WIP]static.c: No linked list in early stages ......................................................................
[WIP]static.c: No linked list in early stages
There is no point in having the full static.c linked list linked inside early stages. On the X220 this reduces the bootblock size by 4.5K
Change-Id: I3d32ffa19aaa587008de404ea28b8342918d817f Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/southbridge/intel/bd82x6x/early_pch.c M src/southbridge/intel/common/gpio.c M src/southbridge/intel/common/pmbase.c M src/southbridge/intel/common/watchdog.c M util/sconfig/main.c 5 files changed, 15 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/56913/1
diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c index 6ed3dce..9d05a35 100644 --- a/src/southbridge/intel/bd82x6x/early_pch.c +++ b/src/southbridge/intel/bd82x6x/early_pch.c @@ -245,7 +245,7 @@ if (ENV_BOOTBLOCK) return;
- const struct device *const gbe = pcidev_on_root(0x19, 0); + const struct device *const gbe = __pci_0_19_0; if (gbe && gbe->enabled) wanted_buc = RCBA8(BUC) & ~PCH_DISABLE_GBE; else @@ -275,7 +275,7 @@ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF2_LPC_EN | CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN | COMB_LPC_EN | COMA_LPC_EN);
- const struct device *dev = pcidev_on_root(0x1f, 0); + const struct device *dev = __pci_0_1f_0; const struct southbridge_intel_bd82x6x_config *config = NULL;
/* Set up generic decode ranges */ diff --git a/src/southbridge/intel/common/gpio.c b/src/southbridge/intel/common/gpio.c index 20071af..bbcf27d 100644 --- a/src/southbridge/intel/common/gpio.c +++ b/src/southbridge/intel/common/gpio.c @@ -24,7 +24,7 @@ if (gpiobase) return gpiobase;
- gpiobase = pci_read_config16(pcidev_on_root(0x1f, 0), GPIO_BASE) & 0xfffe; + gpiobase = pci_read_config16(__pci_0_1f_0, GPIO_BASE) & 0xfffe;
return gpiobase; #endif diff --git a/src/southbridge/intel/common/pmbase.c b/src/southbridge/intel/common/pmbase.c index d5578fc..11d8d2d 100644 --- a/src/southbridge/intel/common/pmbase.c +++ b/src/southbridge/intel/common/pmbase.c @@ -27,7 +27,7 @@ if (pmbase) return pmbase;
- pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), PMBASE) & 0xfffc; + pmbase = pci_read_config16(__pci_0_1f_0, PMBASE) & 0xfffc;
return pmbase; #endif diff --git a/src/southbridge/intel/common/watchdog.c b/src/southbridge/intel/common/watchdog.c index b40c5fe..4ba9436 100644 --- a/src/southbridge/intel/common/watchdog.c +++ b/src/southbridge/intel/common/watchdog.c @@ -18,7 +18,7 @@ struct device *dev;
/* Get LPC device. */ - dev = pcidev_on_root(0x1f, 0); + dev = __pci_0_1f_0;
value = pci_read_config16(dev, PCI_COMMAND);
diff --git a/util/sconfig/main.c b/util/sconfig/main.c index 91c079a..29ede84 100644 --- a/util/sconfig/main.c +++ b/util/sconfig/main.c @@ -1134,6 +1134,7 @@ fprintf(fil, "\t\t[%d] = {\n", bus->id); fprintf(fil, "\t\t\t.link_num = %d,\n", bus->id); fprintf(fil, "\t\t\t.dev = &%s,\n", bus->dev->name); + fprintf(fil, "#if !DEVTREE_EARLY\n"); if (bus->children) fprintf(fil, "\t\t\t.children = &%s,\n", bus->children->name);
@@ -1142,6 +1143,7 @@ bus->id + 1); else fprintf(fil, "\t\t\t.next = NULL,\n"); + fprintf(fil, "#endif\n"); fprintf(fil, "\t\t},\n"); }
@@ -1224,15 +1226,19 @@ fprintf(fil, "\t.resource_list = &%s_res[0],\n", ptr->name); } + fprintf(fil, "#if !DEVTREE_EARLY\n"); if (has_children) fprintf(fil, "\t.link_list = &%s_links[0],\n", ptr->name); else fprintf(fil, "\t.link_list = NULL,\n"); + fprintf(fil, "#endif\n"); + fprintf(fil, "#if !DEVTREE_EARLY\n"); if (ptr->sibling) fprintf(fil, "\t.sibling = &%s,\n", ptr->sibling->name); else fprintf(fil, "\t.sibling = NULL,\n"); + fprintf(fil, "#endif\n"); if (ptr->probe) fprintf(fil, "\t.probe_list = %s_probe_list,\n", ptr->name); fprintf(fil, "#if !DEVTREE_EARLY\n"); @@ -1255,8 +1261,11 @@ if (chip_ins->chip->chiph_exists) fprintf(fil, "\t.chip_info = &%s_info_%d,\n", chip_ins->chip->name_underscore, chip_ins->id); - if (next) + if (next) { + fprintf(fil, "#if !DEVTREE_EARLY\n"); fprintf(fil, "\t.next=&%s,\n", next->name); + fprintf(fil, "#endif\n"); + } if (ptr->smbios_slot_type || ptr->smbios_slot_data_width || ptr->smbios_slot_designation || ptr->smbios_slot_length) { fprintf(fil, "#if !DEVTREE_EARLY\n");