[XS] Change in coreboot[main]: mb/google/cherry: Complete PCIE reset in romstage

[Yidi Lin (Code Review)]

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu.

Yidi Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84118?usp=email )

Change subject: mb/google/cherry: Complete PCIE reset in romstage
......................................................................

mb/google/cherry: Complete PCIE reset in romstage

De-assert PERST# at romstage to reduce the waiting time in ramstage.

Before
```
[INFO ]  wait_perst_done: PCIE early PERST# de-assertion is not done, de-assert PERST# now
[INFO ]  mtk_pcie_domain_enable: PCIe link up success (47 tries)
```
After
```
[INFO ]  wait_perst_done: PCIE early PERST# de-assertion is not done, de-assert PERST# now
[DEBUG]  wait_perst_asserted: 457568 us elapsed since assert PERST#
[DEBUG]  wait_perst_done: 163413 us elapsed since de-assert PERST#
[INFO ]  mtk_pcie_domain_enable: PCIe link up success (1 tries)
```

BUG=none
TEST=boot from NVMe

Change-Id: I3a73bd574ae8f9f4e624846ce8b901a7d2209e78
Signed-off-by: Yidi Lin 
---
M src/mainboard/google/cherry/romstage.c
M src/soc/mediatek/mt8195/Makefile.mk
2 files changed, 4 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/84118/1

diff --git a/src/mainboard/google/cherry/romstage.c b/src/mainboard/google/cherry/romstage.c
index f375867..ab05220 100644
--- a/src/mainboard/google/cherry/romstage.c
+++ b/src/mainboard/google/cherry/romstage.c
@@ -8,6 +8,7 @@
 #include <soc/mt6315.h>
 #include <soc/mt6359p.h>
 #include <soc/mt6360.h>
+#include <soc/pcie.h>
 #include <soc/pll_common.h>
 #include <soc/pmif.h>
 #include <soc/rtc.h>
@@ -33,6 +34,8 @@
    	mt6360_init(I2C7);
    clk_buf_init();
    rtc_boot();
+	if (CONFIG(PCI))
+		mtk_pcie_deassert_perst();
    mtk_dram_init();
    scp_rsi_enable();
 }
diff --git a/src/soc/mediatek/mt8195/Makefile.mk b/src/soc/mediatek/mt8195/Makefile.mk
index a37f715..a3b002e 100644
--- a/src/soc/mediatek/mt8195/Makefile.mk
+++ b/src/soc/mediatek/mt8195/Makefile.mk
@@ -36,6 +36,7 @@
 romstage-y += ../common/mt6359p.c mt6359p.c
 romstage-y += mt6360.c
 romstage-y += mt6691.c
+romstage-$(CONFIG_PCI) += ../common/early_init.c ../common/pcie.c
 romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c

ramstage-y += apusys.c