Change in coreboot[master]: soc/intel/alderlake: Add Acoustic noise mitigation UPDs

[Chen Wisley (Code Review)]

Chen Wisley has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58944 )

Change subject: soc/intel/alderlake: Add Acoustic noise mitigation UPDs
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soc/intel/alderlake: Add Acoustic noise mitigation UPDs

This patch expose the following FSP UPD interface into coreboot:
- AcousticNoiseMitigation
- FastPkgCRampDisable
- SlowSlewRate

BUG=b:204009588
TEST=build

Change-Id: I0b9c18f9b40d30525028e64754dd1dc86c3b2ec6
---
M src/soc/intel/alderlake/chip.h
M src/soc/intel/alderlake/fsp_params.c
2 files changed, 37 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/58944/1

diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h
index d259442..ec8642b 100644
--- a/src/soc/intel/alderlake/chip.h
+++ b/src/soc/intel/alderlake/chip.h
@@ -151,6 +151,21 @@
    FIVR_SS_6 = 44,
 };

+/*
+ * Slew Rate configuration for Deep Package C States for VR domain.
+ * They are fast time divided by 2.
+ * 0 - Fast/2
+ * 1 - Fast/4
+ * 2 - Fast/8
+ * 3 - Fast/16
+ */
+enum slew_rate {
+	SLEW_FAST_2,
+	SLEW_FAST_4,
+	SLEW_FAST_8,
+	SLEW_FAST_16
+};
+
 struct soc_intel_alderlake_config {

/* Common struct containing soc config data required by common code */
@@ -528,6 +543,19 @@
     *   0.5% = 0, 1% = 3, 1.5% = 8, 2% = 18, 3% = 28, 4% = 34, 5% = 39, 6% = 44.
     */
    uint8_t FivrSpreadSpectrum;
+	/*
+	 * Enable or Disable Acoustic Noise Mitigation feature
+	 */
+	uint8_t AcousticNoiseMitigation;
+	/*
+	 * Disable Fast Slew Rate for Deep Package C States for VR domains
+	 */
+	uint8_t FastPkgCRampDisable;
+	/*
+	 * Slew Rate configuration for Deep Package C States for VR domains
+	 * 0: Fast/2, 1: Fast/4, 2: Fast/8, 3: Fast/16
+	 */
+	uint8_t SlowSlewRate;
 };

typedef struct soc_intel_alderlake_config config_t;
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c
index 17edada..3a36b20 100644
--- a/src/soc/intel/alderlake/fsp_params.c
+++ b/src/soc/intel/alderlake/fsp_params.c
@@ -739,6 +739,14 @@
    s_cfg->FivrSpreadSpectrum = config->FivrSpreadSpectrum;
 }

+static void fill_fsps_acoustic_params(FSP_S_CONFIG *s_cfg,
+		const struct soc_intel_alderlake_config *config)
+{
+	s_cfg->AcousticNoiseMitigation = config->AcousticNoiseMitigation;
+	s_cfg->FastPkgCRampDisable[0] = config->FastPkgCRampDisable;
+	s_cfg->SlowSlewRate[0] = config->SlowSlewRate;
+}
+
 static void soc_silicon_init_params(FSP_S_CONFIG *s_cfg,
    	struct soc_intel_alderlake_config *config)
 {
@@ -770,6 +778,7 @@
    	fill_fsps_irq_params,
    	fill_fsps_fivr_params,
    	fill_fsps_fivr_rfi_params,
+		fill_fsps_acoustic_params,
    };

for (size_t i = 0; i < ARRAY_SIZE(fill_fsps_params); i++)