Change in coreboot[master]: [WIP, DONOTMERGE] soc/intel: (try to) run clang-format

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Angel Pons (Code Review)

26 Aug 2019 26 Aug '19

12:51 a.m.

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35090 )

Change subject: [WIP, DONOTMERGE] soc/intel: (try to) run clang-format ......................................................................

[WIP, DONOTMERGE] soc/intel: (try to) run clang-format

Change-Id: I4a1e646d81da329479d6179ed1a42879b5d10fee Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/apollolake/acpi.c M src/soc/intel/apollolake/chip.c M src/soc/intel/apollolake/romstage.c M src/soc/intel/apollolake/uart.c M src/soc/intel/broadwell/acpi.c M src/soc/intel/broadwell/finalize.c M src/soc/intel/broadwell/lpc.c M src/soc/intel/broadwell/smmrelocate.c M src/soc/intel/broadwell/systemagent.c M src/soc/intel/cannonlake/acpi.c M src/soc/intel/cannonlake/fsp_params.c M src/soc/intel/cannonlake/romstage/fsp_params.c M src/soc/intel/cannonlake/smmrelocate.c M src/soc/intel/cannonlake/uart.c M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/common/block/gspi/gspi.c M src/soc/intel/common/block/i2c/i2c.c M src/soc/intel/common/block/xhci/xhci.c M src/soc/intel/denverton_ns/memmap.c M src/soc/intel/fsp_baytrail/acpi.c M src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c M src/soc/intel/fsp_broadwell_de/acpi.c M src/soc/intel/icelake/fsp_params.c M src/soc/intel/icelake/romstage/fsp_params.c M src/soc/intel/icelake/smmrelocate.c M src/soc/intel/icelake/uart.c M src/soc/intel/skylake/acpi.c M src/soc/intel/skylake/chip.c M src/soc/intel/skylake/chip_fsp20.c M src/soc/intel/skylake/irq.c M src/soc/intel/skylake/memmap.c M src/soc/intel/skylake/romstage/romstage_fsp20.c M src/soc/intel/skylake/romstage/systemagent.c M src/soc/intel/skylake/smmrelocate.c M src/soc/intel/skylake/systemagent.c M src/soc/intel/skylake/uart.c M src/soc/intel/skylake/vr_config.c 37 files changed, 2,180 insertions(+), 2,595 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/35090/1

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build bot (Jenkins) (Code Review)

26 Aug 26 Aug

12:51 a.m.

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35090 )

Change subject: [WIP, DONOTMERGE] soc/intel: (try to) run clang-format ......................................................................

Patch Set 1:

(118 comments)

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/apollolake/ac... File src/soc/intel/apollolake/acpi.c:

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/apollolake/ac... PS1, Line 67: }}; space required after that close brace '}'

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/apollolake/ua... File src/soc/intel/apollolake/uart.c:

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/apollolake/ua... PS1, Line 34: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/apollolake/ua... PS1, Line 45: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/apollolake/ua... PS1, Line 56: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/apollolake/ua... PS1, Line 64: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/apollolake/ua... PS1, Line 72: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... File src/soc/intel/broadwell/acpi.c:

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 47: C_STATE_C1, /* 1 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 48: C_STATE_C1E, /* 2 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 49: C_STATE_C3, /* 3 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 50: C_STATE_C6_SHORT_LAT, /* 4 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 51: C_STATE_C6_LONG_LAT, /* 5 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 52: C_STATE_C7_SHORT_LAT, /* 6 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 53: C_STATE_C7_LONG_LAT, /* 7 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 54: C_STATE_C7S_SHORT_LAT, /* 8 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 55: C_STATE_C7S_LONG_LAT, /* 9 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 56: C_STATE_C8, /* 10 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 57: C_STATE_C9, /* 11 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 58: C_STATE_C10, /* 12 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 59: NUM_C_STATES }; please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 72: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 78: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 84: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 90: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 96: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 102: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 108: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 114: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 120: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 126: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 132: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/acp... PS1, Line 138: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/sys... File src/soc/intel/broadwell/systemagent.c:

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/sys... PS1, Line 231: TOUUD_REG, please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/sys... PS1, Line 232: MESEG_BASE_REG, please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/sys... PS1, Line 233: MESEG_LIMIT_REG, please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/sys... PS1, Line 234: REMAP_BASE_REG, please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/sys... PS1, Line 235: REMAP_LIMIT_REG, please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/sys... PS1, Line 236: TOLUD_REG, please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/sys... PS1, Line 237: BGSM_REG, please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/sys... PS1, Line 238: BDSM_REG, please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/sys... PS1, Line 239: TSEG_REG, please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/broadwell/sys... PS1, Line 241: NUM_MAP_ENTRIES }; please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... File src/soc/intel/cannonlake/acpi.c:

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 46: C_STATE_C1, /* 1 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 47: C_STATE_C1E, /* 2 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 48: C_STATE_C6_SHORT_LAT, /* 3 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 49: C_STATE_C6_LONG_LAT, /* 4 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 50: C_STATE_C7_SHORT_LAT, /* 5 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 51: C_STATE_C7_LONG_LAT, /* 6 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 52: C_STATE_C7S_SHORT_LAT, /* 7 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 53: C_STATE_C7S_LONG_LAT, /* 8 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 54: C_STATE_C8, /* 9 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 55: C_STATE_C9, /* 10 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 56: C_STATE_C10, /* 11 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 57: NUM_C_STATES }; please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 70: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 76: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 82: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 88: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 94: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 100: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 106: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 112: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 118: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 124: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ac... PS1, Line 130: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/fs... File src/soc/intel/cannonlake/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/fs... PS1, Line 70: for (i = 0; i < CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX; i++, dev_offset++) { braces {} are not necessary for single statement blocks

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ua... File src/soc/intel/cannonlake/uart.c:

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ua... PS1, Line 31: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ua... PS1, Line 39: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ua... PS1, Line 47: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/cannonlake/ua... PS1, Line 51: }}; space required after that close brace '}'

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/common/block/... File src/soc/intel/common/block/gspi/gspi.c:

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/common/block/... PS1, Line 638: void (*fn_read)(struct gspi_ctrlr_params * p) = gspi_read_data; "foo * bar" should be "foo *bar"

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/common/block/... PS1, Line 646: void (*fn_write)(struct gspi_ctrlr_params * p) = gspi_write_data; "foo * bar" should be "foo *bar"

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/fsp_baytrail/... File src/soc/intel/fsp_baytrail/acpi.c:

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/fsp_baytrail/... PS1, Line 65: { Statements should start on a tabstop

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/fsp_baytrail/... PS1, Line 73: { Statements should start on a tabstop

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/fsp_baytrail/... PS1, Line 79: }}; space required after that close brace '}'

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/fsp_baytrail/... File src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c:

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/fsp_baytrail/... PS1, Line 59: static const char *acpi_pci_mode_strings[] = {"Disabled", "Enabled in PCI Mode", static const char * array should probably be static const char * const

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/fsp_baytrail/... PS1, Line 62: static const char *emmc_mode_strings[] = {"Disabled", "Auto", "eMMC 4.1", "eMMC 4.5"}; static const char * array should probably be static const char * const

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/fsp_baytrail/... PS1, Line 157: case MIPI_DEV_FUNC: /* Camera / Image Signal Processing */ Possible switch case/default not preceded by break or fallthrough comment

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/fsp_broadwell... File src/soc/intel/fsp_broadwell_de/acpi.c:

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/fsp_broadwell... PS1, Line 66: { Statements should start on a tabstop

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/fsp_broadwell... PS1, Line 73: { Statements should start on a tabstop

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/fsp_broadwell... PS1, Line 79: }}; space required after that close brace '}'

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/icelake/uart.... File src/soc/intel/icelake/uart.c:

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/icelake/uart.... PS1, Line 31: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/icelake/uart.... PS1, Line 39: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/icelake/uart.... PS1, Line 47: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/icelake/uart.... PS1, Line 51: }}; space required after that close brace '}'

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... File src/soc/intel/skylake/acpi.c:

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 59: C_STATE_C1, /* 1 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 60: C_STATE_C1E, /* 2 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 61: C_STATE_C3, /* 3 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 62: C_STATE_C6_SHORT_LAT, /* 4 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 63: C_STATE_C6_LONG_LAT, /* 5 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 64: C_STATE_C7_SHORT_LAT, /* 6 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 65: C_STATE_C7_LONG_LAT, /* 7 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 66: C_STATE_C7S_SHORT_LAT, /* 8 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 67: C_STATE_C7S_LONG_LAT, /* 9 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 68: C_STATE_C8, /* 10 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 69: C_STATE_C9, /* 11 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 70: C_STATE_C10, /* 12 */ please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 71: NUM_C_STATES }; please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 83: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 89: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 95: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 101: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 107: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 113: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 119: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 125: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 131: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 137: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 143: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/acpi.... PS1, Line 149: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/uart.... File src/soc/intel/skylake/uart.c:

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/uart.... PS1, Line 32: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/uart.... PS1, Line 40: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/uart.... PS1, Line 48: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/uart.... PS1, Line 52: }}; space required after that close brace '}'

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/vr_co... File src/soc/intel/skylake/vr_config.c:

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/vr_co... PS1, Line 28: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/vr_co... PS1, Line 41: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/vr_co... PS1, Line 55: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/vr_co... PS1, Line 69: { that open brace { should be on the previous line

https://review.coreboot.org/c/coreboot/+/35090/1/src/soc/intel/skylake/vr_co... PS1, Line 82: { that open brace { should be on the previous line

-- To view, visit https://review.coreboot.org/c/coreboot/+/35090 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4a1e646d81da329479d6179ed1a42879b5d10fee Gerrit-Change-Number: 35090 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: David Guckian david.guckian@intel.com Gerrit-Reviewer: Huang Jin huang.jin@intel.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: Philipp Deppenwiese zaolin.daisuki@gmail.com Gerrit-Reviewer: Vanny E vanessa.f.eusebio@intel.com Gerrit-CC: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Mon, 26 Aug 2019 00:51:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

Angel Pons (Code Review)

11 Dec 11 Dec

11:22 p.m.

Angel Pons has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/35090 )

Change subject: [WIP, DONOTMERGE] soc/intel: (try to) run clang-format ......................................................................

Abandoned

I'd rather fix formatting issues by hand

-- To view, visit https://review.coreboot.org/c/coreboot/+/35090 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4a1e646d81da329479d6179ed1a42879b5d10fee Gerrit-Change-Number: 35090 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: David Guckian david.guckian@intel.com Gerrit-Reviewer: Huang Jin huang.jin@intel.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: Philipp Deppenwiese zaolin.daisuki@gmail.com Gerrit-Reviewer: Vanessa Eusebio vanessa.f.eusebio@intel.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-MessageType: abandon

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Angel Pons (Code Review)
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