[XS] Change in coreboot[main]: mb/trulo/var/uldrenite: Support USB_OC on the A0 port

[John Su (Code Review)]

John Su has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85653?usp=email )

Change subject: mb/trulo/var/uldrenite: Support USB_OC on the A0 port
......................................................................

mb/trulo/var/uldrenite: Support USB_OC on the A0 port

According to the discussion on the issue tracker, set
GPP_A14 as USB_OC1 for the A0 port

BUG=b:380789023
TEST=emerge-nissa coreboot

Change-Id: I2b782216c0392b1a98ea57300e683c32999d5a32
Signed-off-by: John Su 
---
M src/mainboard/google/brya/variants/uldrenite/gpio.c
M src/mainboard/google/brya/variants/uldrenite/overridetree.cb
2 files changed, 3 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/85653/1

diff --git a/src/mainboard/google/brya/variants/uldrenite/gpio.c b/src/mainboard/google/brya/variants/uldrenite/gpio.c
index cdae233..4b900fb 100644
--- a/src/mainboard/google/brya/variants/uldrenite/gpio.c
+++ b/src/mainboard/google/brya/variants/uldrenite/gpio.c
@@ -30,8 +30,8 @@
    PAD_NC(GPP_A12, NONE),
    /* A13 : GPP_A13 ==> SOC_BT_ON */
    PAD_CFG_GPO_LOCK(GPP_A13, 1, LOCK_CONFIG),
-	/* A14 : USB_OC1# ==> NC */
-	PAD_NC(GPP_A14, NONE),
+	/* A14 : USB_OC1# */
+	PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1),
    /* A15 : USB_OC2# ==> NC */
    PAD_NC(GPP_A15, NONE),
    /* A16 : USB_OC3# ==> NC */
diff --git a/src/mainboard/google/brya/variants/uldrenite/overridetree.cb b/src/mainboard/google/brya/variants/uldrenite/overridetree.cb
index 7c8dddf..3a1482c 100644
--- a/src/mainboard/google/brya/variants/uldrenite/overridetree.cb
+++ b/src/mainboard/google/brya/variants/uldrenite/overridetree.cb
@@ -63,7 +63,7 @@

register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C0
    register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C1
-	register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"    # USB2_A0
+	register "usb2_ports[2]" = "USB2_PORT_MID(OC1)"    # USB2_A0
    register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)"    # WWAN
    register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)"    # User Facing Camera
    register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)"    # World Facing Camera