Yilin Yang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45440 )
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
util/mtkheader: Port gen-bl-img.py to python3
Test steps : 1. Use python2 script 2. Run `emerge-board coreboot` twice, so we get bootblock.bin.1 and bootblock.bin.2 3. Run `xxd` on these two bootblock so we get bootblock.bin.1.hex and bootblock.bin.2.hex 4. `diff bootblock.bin.1.hex bootblock.bin.2.hex` and record the difference. (at least, the time info changes) 5. Migrate to python3 6. Similar steps, we get bootblock.bin.py3.hex 7. `diff bootblock.bin.1.hex bootblock.bin.py3.hex`, the difference is similar.
BUG=chromium:1023662
Signed-off-by: Yilin Yang kerker@google.com Change-Id: I788e7c9b09257142728a0f76df8c2ccc72bf6b3b --- M util/mtkheader/gen-bl-img.py 1 file changed, 17 insertions(+), 17 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/45440/1
diff --git a/util/mtkheader/gen-bl-img.py b/util/mtkheader/gen-bl-img.py index 282dfbf..1627a79 100755 --- a/util/mtkheader/gen-bl-img.py +++ b/util/mtkheader/gen-bl-img.py @@ -1,4 +1,4 @@ -#!/usr/bin/env python2 +#!/usr/bin/env python3 # # SPDX-License-Identifier: GPL-2.0-only
@@ -14,10 +14,10 @@ with open(path, 'wb') as f: f.write(data)
-def padding(data, size, pattern='\0'): +def padding(data, size, pattern=b'\0'): return data + pattern * (size - len(data))
-def align(data, size, pattern='\0'): +def align(data, size, pattern=b'\0'): return padding(data, (len(data) + (size - 1)) & ~(size - 1), pattern)
def gen_gfh_info(chip, data): @@ -47,19 +47,19 @@ return gfh
def gen_emmc_header(data): - header = (padding(struct.pack('<12sII', 'EMMC_BOOT', 1, 512), 512, '\xff') + - padding(struct.pack('<8sIIIIIIII', 'BRLYT', 1, 2048, 2048 + len(data), - 0x42424242, 0x00010005, 2048, 2048 + len(data), 1) + '\0' * 140, 512, - '\xff') + - '\0' * 1024) + header = (padding(struct.pack('<12sII', b'EMMC_BOOT', 1, 512), 512, b'\xff') + + padding(struct.pack('<8sIIIIIIII', b'BRLYT', 1, 2048, 2048 + len(data), + 0x42424242, 0x00010005, 2048, 2048 + len(data), 1) + b'\0' * 140, 512, + b'\xff') + + b'\0' * 1024) return header
def gen_sf_header(data): - header = (padding(struct.pack('<12sII', 'SF_BOOT', 1, 512), 512, '\xff') + - padding(struct.pack('<8sIIIIIIII', 'BRLYT', 1, 2048, 2048 + len(data), - 0x42424242, 0x00010007, 2048, 2048 + len(data), 1) + '\0' * 140, 512, - '\xff') + - '\0' * 1024) + header = (padding(struct.pack('<12sII', b'SF_BOOT', 1, 512), 512, b'\xff') + + padding(struct.pack('<8sIIIIIIII', b'BRLYT', 1, 2048, 2048 + len(data), + 0x42424242, 0x00010007, 2048, 2048 + len(data), 1) + b'\0' * 140, 512, + b'\xff') + + b'\0' * 1024) return header
gen_dev_header = { @@ -71,15 +71,15 @@ gfh_info = gen_gfh_info(chip_ver, data) gfh_hash = hashlib.sha256(gfh_info + data).digest()
- data = align(gfh_info + data + gfh_hash, 512, '\xff') + data = align(gfh_info + data + gfh_hash, 512, b'\xff') header = gen_dev_header[flash_type](data) return header + data
def main(argv): if len(argv) != 5: - print 'Usage: %s <chip> <flash_type> <input_file> <output_file>' % argv[0] - print '\t flash_type: emmc|sf' - print '\t chip : mt8173|mt8183' + print('Usage: %s <chip> <flash_type> <input_file> <output_file>' % argv[0]) + print('\t flash_type: emmc|sf') + print('\t chip : mt8173|mt8183')
exit(1) write(argv[4], gen_preloader(argv[1], argv[2], read(argv[3])))
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45440 )
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/45440/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45440/1//COMMIT_MSG@9 PS1, Line 9: Test steps : : 1. Use python2 script : 2. Run `emerge-board coreboot` twice, so we get bootblock.bin.1 and : bootblock.bin.2 : 3. Run `xxd` on these two bootblock so we get bootblock.bin.1.hex and : bootblock.bin.2.hex : 4. `diff bootblock.bin.1.hex bootblock.bin.2.hex` and record the : difference. (at least, the time info changes) : 5. Migrate to python3 : 6. Similar steps, we get bootblock.bin.py3.hex : 7. `diff bootblock.bin.1.hex bootblock.bin.py3.hex`, the difference is : similar. Could you put these in the TEST field below BUG=...?
TEST=1. Use python2 script 2. ...
https://review.coreboot.org/c/coreboot/+/45440/1/util/mtkheader/gen-bl-img.p... File util/mtkheader/gen-bl-img.py:
https://review.coreboot.org/c/coreboot/+/45440/1/util/mtkheader/gen-bl-img.p... PS1, Line 79: if len(argv) != 5: : print('Usage: %s <chip> <flash_type> <input_file> <output_file>' % argv[0]) : print('\t flash_type: emmc|sf') : print('\t chip : mt8173|mt8183') : : exit(1) Use the argparse module? Or at least change to use the f-string.
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45440 )
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45440/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45440/1//COMMIT_MSG@11 PS1, Line 11: board Which board did you test? asurada or kukui?
Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45440
to look at the new patch set (#2).
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
util/mtkheader: Port gen-bl-img.py to python3
BUG=chromium:1023662 TEST=1. Use python2 script 2. Run `emerge-asurada coreboot` twice, so we get bootblock.bin.1 and bootblock.bin.2 3. Run `xxd` on these two bootblock so we get bootblock.bin.1.hex and bootblock.bin.2.hex 4. `diff bootblock.bin.1.hex bootblock.bin.2.hex` and record the difference. (at least, the time info changes) 5. Migrate to python3 6. Similar steps, we get bootblock.bin.py3.hex 7. `diff bootblock.bin.1.hex bootblock.bin.py3.hex`, the difference is similar.
Signed-off-by: Yilin Yang kerker@google.com Change-Id: I788e7c9b09257142728a0f76df8c2ccc72bf6b3b --- M util/mtkheader/gen-bl-img.py 1 file changed, 17 insertions(+), 17 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/45440/2
Yilin Yang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45440 )
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
Patch Set 2:
(3 comments)
https://review.coreboot.org/c/coreboot/+/45440/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45440/1//COMMIT_MSG@11 PS1, Line 11: board
Which board did you test? asurada or kukui?
asurada, I am just not sure if we can put the board name here.
https://review.coreboot.org/c/coreboot/+/45440/1//COMMIT_MSG@9 PS1, Line 9: Test steps : : 1. Use python2 script : 2. Run `emerge-board coreboot` twice, so we get bootblock.bin.1 and : bootblock.bin.2 : 3. Run `xxd` on these two bootblock so we get bootblock.bin.1.hex and : bootblock.bin.2.hex : 4. `diff bootblock.bin.1.hex bootblock.bin.2.hex` and record the : difference. (at least, the time info changes) : 5. Migrate to python3 : 6. Similar steps, we get bootblock.bin.py3.hex : 7. `diff bootblock.bin.1.hex bootblock.bin.py3.hex`, the difference is : similar.
Could you put these in the TEST field below BUG=...? […]
Done
https://review.coreboot.org/c/coreboot/+/45440/1/util/mtkheader/gen-bl-img.p... File util/mtkheader/gen-bl-img.py:
https://review.coreboot.org/c/coreboot/+/45440/1/util/mtkheader/gen-bl-img.p... PS1, Line 79: if len(argv) != 5: : print('Usage: %s <chip> <flash_type> <input_file> <output_file>' % argv[0]) : print('\t flash_type: emmc|sf') : print('\t chip : mt8173|mt8183') : : exit(1)
Use the argparse module? Or at least change to use the f-string.
I think it's not related to the migration, because it at least works.
Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45440
to look at the new patch set (#3).
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
util/mtkheader: Port gen-bl-img.py to python3
BUG=chromium:1023662 TEST=1. Use python2 script 2. Run `emerge-asurada coreboot` twice, so we get bootblock.bin.1 and bootblock.bin.2 3. Run `xxd` on these two bootblock so we get bootblock.bin.1.hex and bootblock.bin.2.hex 4. `diff bootblock.bin.1.hex bootblock.bin.2.hex` and record the difference. (at least, the time info changes) 5. Migrate to python3 6. Similar steps, we get bootblock.bin.py3.hex 7. `diff bootblock.bin.1.hex bootblock.bin.py3.hex`, the difference is similar.
Signed-off-by: Yilin Yang kerker@google.com Change-Id: I788e7c9b09257142728a0f76df8c2ccc72bf6b3b --- M util/mtkheader/gen-bl-img.py 1 file changed, 17 insertions(+), 17 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/45440/3
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45440 )
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
Patch Set 3: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/45440/1/util/mtkheader/gen-bl-img.p... File util/mtkheader/gen-bl-img.py:
https://review.coreboot.org/c/coreboot/+/45440/1/util/mtkheader/gen-bl-img.p... PS1, Line 79: if len(argv) != 5: : print('Usage: %s <chip> <flash_type> <input_file> <output_file>' % argv[0]) : print('\t flash_type: emmc|sf') : print('\t chip : mt8173|mt8183') : : exit(1)
I think it's not related to the migration, because it at least works.
Ack
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45440 )
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45440/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45440/1//COMMIT_MSG@11 PS1, Line 11: board
asurada, I am just not sure if we can put the board name here.
overlay names that you can find in src/overlays are all public so you can mention them.
Yilin Yang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45440 )
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
Patch Set 3:
@hungte,
I don't have the permission to get it merged. Should I do sth to get the green light to submit?
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45440 )
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
Patch Set 3:
I don't have the permission to get it merged. Should I do sth to get the green light to submit?
No, we run a different process here. You only need to make sure the three checks are all set (Verified +1, CR+2, ACR good) then the committers (including me) will take care of that. Thanks!
Yilin Yang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45440 )
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
Patch Set 3:
Patch Set 3:
I don't have the permission to get it merged. Should I do sth to get the green light to submit?
No, we run a different process here. You only need to make sure the three checks are all set (Verified +1, CR+2, ACR good) then the committers (including me) will take care of that. Thanks!
Got it, thanks!
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45440 )
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45440/3/util/mtkheader/gen-bl-img.p... File util/mtkheader/gen-bl-img.py:
https://review.coreboot.org/c/coreboot/+/45440/3/util/mtkheader/gen-bl-img.p... PS3, Line 1: #!/usr/bin/env python3 Can it be ported to be compatible with both Python versions?
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45440 )
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45440/3/util/mtkheader/gen-bl-img.p... File util/mtkheader/gen-bl-img.py:
https://review.coreboot.org/c/coreboot/+/45440/3/util/mtkheader/gen-bl-img.p... PS3, Line 1: #!/usr/bin/env python3
Can it be ported to be compatible with both Python versions?
I'd recommend keeping python3 specific, especially most other coreboot build scripts and also python3 now.
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45440 )
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
Patch Set 3:
Hi Kerker, can you add one more change?
The util/mtkheader/description.md should be changed to 'Python3'.
Aldo util/README.md __mtkheader__
Yilin Yang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45440 )
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
Patch Set 3:
Patch Set 3:
Hi Kerker, can you add one more change?
The util/mtkheader/description.md should be changed to 'Python3'.
Aldo util/README.md __mtkheader__
I noticed that, but can we change them in single CL in one time ? Otherwise, we may conflict in README.md.
Yilin Yang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45440 )
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
Patch Set 3:
Patch Set 3:
Patch Set 3:
Hi Kerker, can you add one more change?
The util/mtkheader/description.md should be changed to 'Python3'.
Aldo util/README.md __mtkheader__
I noticed that, but can we change them in single CL in one time ? Otherwise, we may conflict in README.md.
Or I can chain these 3 CLs in order, I think I can do this. 😉
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45440 )
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
Patch Set 3:
Yes you can chain them together.
I think we usually want to keep documents updated in the same place where the implementation changed. Thanks!
Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45440
to look at the new patch set (#4).
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
util/mtkheader: Port gen-bl-img.py to python3
BUG=chromium:1023662 TEST=1. Use python2 script 2. Run `emerge-asurada coreboot` twice, so we get bootblock.bin.1 and bootblock.bin.2 3. Run `xxd` on these two bootblock so we get bootblock.bin.1.hex and bootblock.bin.2.hex 4. `diff bootblock.bin.1.hex bootblock.bin.2.hex` and record the difference. (at least, the time info changes) 5. Migrate to python3 6. Similar steps, we get bootblock.bin.py3.hex 7. `diff bootblock.bin.1.hex bootblock.bin.py3.hex`, the difference is similar.
Signed-off-by: Yilin Yang kerker@google.com Change-Id: I788e7c9b09257142728a0f76df8c2ccc72bf6b3b --- M util/README.md M util/mtkheader/description.md M util/mtkheader/gen-bl-img.py 3 files changed, 19 insertions(+), 19 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/45440/4
Yilin Yang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45440 )
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
Patch Set 4:
Patch Set 3:
Yes you can chain them together.
I think we usually want to keep documents updated in the same place where the implementation changed. Thanks!
Done~
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45440 )
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
Patch Set 4: Code-Review+2
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45440 )
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
Patch Set 4: Code-Review+2
Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45440 )
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
util/mtkheader: Port gen-bl-img.py to python3
BUG=chromium:1023662 TEST=1. Use python2 script 2. Run `emerge-asurada coreboot` twice, so we get bootblock.bin.1 and bootblock.bin.2 3. Run `xxd` on these two bootblock so we get bootblock.bin.1.hex and bootblock.bin.2.hex 4. `diff bootblock.bin.1.hex bootblock.bin.2.hex` and record the difference. (at least, the time info changes) 5. Migrate to python3 6. Similar steps, we get bootblock.bin.py3.hex 7. `diff bootblock.bin.1.hex bootblock.bin.py3.hex`, the difference is similar.
Signed-off-by: Yilin Yang kerker@google.com Change-Id: I788e7c9b09257142728a0f76df8c2ccc72bf6b3b Reviewed-on: https://review.coreboot.org/c/coreboot/+/45440 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Hung-Te Lin hungte@chromium.org Reviewed-by: Yu-Ping Wu yupingso@google.com --- M util/README.md M util/mtkheader/description.md M util/mtkheader/gen-bl-img.py 3 files changed, 19 insertions(+), 19 deletions(-)
Approvals: build bot (Jenkins): Verified Hung-Te Lin: Looks good to me, approved Yu-Ping Wu: Looks good to me, approved
diff --git a/util/README.md b/util/README.md index 8b05f6f..5ed4e75 100644 --- a/util/README.md +++ b/util/README.md @@ -65,7 +65,7 @@ partial deblobbing of Intel ME/TXE firmware images `Python` * __mma__ - Memory Margin Analysis automation tests `Bash` * __msrtool__ - Dumps chipset-specific MSR registers. `C` -* __mtkheader__ - Generate MediaTek bootload header. `Python2` +* __mtkheader__ - Generate MediaTek bootload header. `Python3` * __nvidia__ - nvidia blob parsers * __nvramtool__ - Reads and writes coreboot parameters and displaying information from the coreboot table in CMOS/NVRAM. `C` diff --git a/util/mtkheader/description.md b/util/mtkheader/description.md index d426636..01c0776 100644 --- a/util/mtkheader/description.md +++ b/util/mtkheader/description.md @@ -1 +1 @@ -Generate MediaTek bootload header. `Python2` +Generate MediaTek bootload header. `Python3` diff --git a/util/mtkheader/gen-bl-img.py b/util/mtkheader/gen-bl-img.py index 282dfbf..1627a79 100755 --- a/util/mtkheader/gen-bl-img.py +++ b/util/mtkheader/gen-bl-img.py @@ -1,4 +1,4 @@ -#!/usr/bin/env python2 +#!/usr/bin/env python3 # # SPDX-License-Identifier: GPL-2.0-only
@@ -14,10 +14,10 @@ with open(path, 'wb') as f: f.write(data)
-def padding(data, size, pattern='\0'): +def padding(data, size, pattern=b'\0'): return data + pattern * (size - len(data))
-def align(data, size, pattern='\0'): +def align(data, size, pattern=b'\0'): return padding(data, (len(data) + (size - 1)) & ~(size - 1), pattern)
def gen_gfh_info(chip, data): @@ -47,19 +47,19 @@ return gfh
def gen_emmc_header(data): - header = (padding(struct.pack('<12sII', 'EMMC_BOOT', 1, 512), 512, '\xff') + - padding(struct.pack('<8sIIIIIIII', 'BRLYT', 1, 2048, 2048 + len(data), - 0x42424242, 0x00010005, 2048, 2048 + len(data), 1) + '\0' * 140, 512, - '\xff') + - '\0' * 1024) + header = (padding(struct.pack('<12sII', b'EMMC_BOOT', 1, 512), 512, b'\xff') + + padding(struct.pack('<8sIIIIIIII', b'BRLYT', 1, 2048, 2048 + len(data), + 0x42424242, 0x00010005, 2048, 2048 + len(data), 1) + b'\0' * 140, 512, + b'\xff') + + b'\0' * 1024) return header
def gen_sf_header(data): - header = (padding(struct.pack('<12sII', 'SF_BOOT', 1, 512), 512, '\xff') + - padding(struct.pack('<8sIIIIIIII', 'BRLYT', 1, 2048, 2048 + len(data), - 0x42424242, 0x00010007, 2048, 2048 + len(data), 1) + '\0' * 140, 512, - '\xff') + - '\0' * 1024) + header = (padding(struct.pack('<12sII', b'SF_BOOT', 1, 512), 512, b'\xff') + + padding(struct.pack('<8sIIIIIIII', b'BRLYT', 1, 2048, 2048 + len(data), + 0x42424242, 0x00010007, 2048, 2048 + len(data), 1) + b'\0' * 140, 512, + b'\xff') + + b'\0' * 1024) return header
gen_dev_header = { @@ -71,15 +71,15 @@ gfh_info = gen_gfh_info(chip_ver, data) gfh_hash = hashlib.sha256(gfh_info + data).digest()
- data = align(gfh_info + data + gfh_hash, 512, '\xff') + data = align(gfh_info + data + gfh_hash, 512, b'\xff') header = gen_dev_header[flash_type](data) return header + data
def main(argv): if len(argv) != 5: - print 'Usage: %s <chip> <flash_type> <input_file> <output_file>' % argv[0] - print '\t flash_type: emmc|sf' - print '\t chip : mt8173|mt8183' + print('Usage: %s <chip> <flash_type> <input_file> <output_file>' % argv[0]) + print('\t flash_type: emmc|sf') + print('\t chip : mt8173|mt8183')
exit(1) write(argv[4], gen_preloader(argv[1], argv[2], read(argv[3])))
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45440 )
Change subject: util/mtkheader: Port gen-bl-img.py to python3 ......................................................................
Patch Set 5:
Automatic boot test returned (PASS/FAIL/TOTAL): 8/1/9 "QEMU x86 q35/ich9" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/19914 "QEMU x86 q35/ich9" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/19913 "QEMU x86 i440fx/piix4" (x86_64) using payload SeaBIOS : FAIL : https://lava.9esec.io/r/19912 "QEMU x86 i440fx/piix4" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/19911 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/19910 "HP Z220 SFF Workstation" (x86_32) using payload LinuxBoot_BusyBox_kexec : SUCCESS : https://lava.9esec.io/r/19918 "HP Z220 SFF Workstation" (x86_32) using payload LinuxBoot_BusyBox_kexec : SUCCESS : https://lava.9esec.io/r/19917 "HP Compaq 8200 Elite SFF PC" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/19916 "HP Compaq 8200 Elite SFF PC" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/19915
Please note: This test is under development and might not be accurate at all!