Attention is currently required from: Cliff Huang, Jérémy Compostella, Kapil Porwal, Pranava Y N, Ravishankar Sarawadi, Subrata Banik.
Saurabh Mishra has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83635?usp=email )
Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till romstage
......................................................................
Patch Set 71:
(4 comments)
File src/soc/intel/pantherlake/chip.h:
https://review.coreboot.org/c/coreboot/+/83635/comment/3b9f52c7_2457f2ac?usp... :
PS71, Line 148:
this shouldn't be a tab.
Acknowledged
https://review.coreboot.org/c/coreboot/+/83635/comment/18dda5c8_95f611a2?usp... :
PS71, Line 247: (1 << 0),
BIT(0)
Acknowledged
File src/soc/intel/pantherlake/include/soc/pmc.h:
https://review.coreboot.org/c/coreboot/+/83635/comment/ab1b4e07_654e6a14?usp... :
PS71, Line 131: #define PMC_GPP_H 0x5
Please help add missing GPP group A: […]
Acknowledged
File src/soc/intel/pantherlake/include/soc/romstage.h:
https://review.coreboot.org/c/coreboot/+/83635/comment/c2aa9558_cb9ccda7?usp... :
PS71, Line 10: struct soc_intel_pantherlake_config
Use `config_t` type.
Acknowledged
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