Change in coreboot[master]: cpu/intel/socket_p: Increase DCACHE_RAM_SIZE - coreboot-gerrit

25 Apr 2022


      Attention is currently required from: Arthur Heymans, Alexander Couzens, Patrick Rudolph, Swift Geek (Sebastian Grzywna).
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52942 )
Change subject: cpu/intel/socket_p: Increase DCACHE_RAM_SIZE
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Patch Set 2: Code-Review+2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I0d6f7f9151ecd4c9fbbba4ed033dfda8724b6772
Gerrit-Change-Number: 52942
Gerrit-PatchSet: 2
Gerrit-Owner: Arthur Heymans arthur@aheymans.xyz
Gerrit-Reviewer: Alexander Couzens lynxis@fe80.eu
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