New patch to review for coreboot: eb5907e peppy and falco: set panel power timings in northbridge, using devicetree, not mainboards

[Isaac Christensen]

Isaac Christensen ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6911

-gerrit

commit eb5907ed9692309bc8bd55b7dea54f54afe1bb00
Author: Ronald G. Minnich 
Date:   Tue Dec 17 15:21:54 2013 -0800

peppy and falco: set panel power timings in northbridge, using devicetree, not mainboards

Historically we had set panel timing in the mainboard gma code. This goes
    back to the replay-attack video startup.

We can let the haswell gma code set these values from the device tree
    settings.

Change-Id: If32150d2857241ca2d2c88880086f49d25815d76
    Signed-off-by: Ronald G. Minnich 
    Reviewed-on: https://chromium-review.googlesource.com/180521
    Reviewed-by: Aaron Durbin 
    Commit-Queue: Ronald Minnich 
    Tested-by: Ronald Minnich 
    (cherry picked from commit 406eab3ca6a9bc59382866817786bf96bbb19d56)
    Signed-off-by: Isaac Christensen 
---
 src/mainboard/google/falco/gma.c    | 3 ---
 src/mainboard/google/peppy/gma.c    | 5 -----
 src/northbridge/intel/haswell/gma.c | 1 -
 3 files changed, 9 deletions(-)

diff --git a/src/mainboard/google/falco/gma.c b/src/mainboard/google/falco/gma.c
index 4e32b28..38ea162 100644
--- a/src/mainboard/google/falco/gma.c
+++ b/src/mainboard/google/falco/gma.c
@@ -189,9 +189,6 @@ int panel_lightup(struct intel_dp *dp, unsigned int init_fb)
    /* These values are used for training the link */
    dp->lane_count = 2;
    dp->link_bw = DP_LINK_BW_2_7;
-	dp->panel_power_down_delay = 600;
-	dp->panel_power_up_delay = 200;
-	dp->panel_power_cycle_delay = 600;
    dp->pipe = PIPE_A;
    dp->port = PORT_A;
    dp->plane = PLANE_A;
diff --git a/src/mainboard/google/peppy/gma.c b/src/mainboard/google/peppy/gma.c
index 9b8a32b..972dd76 100644
--- a/src/mainboard/google/peppy/gma.c
+++ b/src/mainboard/google/peppy/gma.c
@@ -215,11 +215,6 @@ int panel_lightup(struct intel_dp *dp, unsigned int init_fb)
    dp->aux_clock_divider = 0xe1;
    dp->precharge = 3;

-	/* CRAP -- needs to be done elsewhere from the device tree. */
-	dp->panel_power_down_delay = 600;
-	dp->panel_power_up_delay = 200;
-	dp->panel_power_cycle_delay = 600;
-
    /* 1. Normal mode: Set the first page to zero and make
       all GTT entries point to the same page
       2. Developer/Recovery mode: Set up a tasteful color
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
index 015eabe..373f429 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
@@ -460,7 +460,6 @@ static void gma_func0_init(struct device *dev)
    dp.panel_power_up_delay = conf->gpu_panel_power_up_delay;
    dp.panel_power_cycle_delay = conf->gpu_panel_power_cycle_delay;

-	dp.physbase = pci_read_config32(dev, 0x5c) & ~0xf;
 #ifdef CONFIG_CHROMEOS
    init_fb = developer_mode_enabled() || recovery_mode_enabled();
 #endif