Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85622?usp=email )
Change subject: commonlib: Refactor CSE sync eventLog ......................................................................
commonlib: Refactor CSE sync eventLog
This patch enhances the readability of the CSE sync event ELOG_TYPE_FW_CSE_SYNC by updating the event naming from "early and late bootstage" to "pre and post memory."
BUG=b:379585294 TEST=boot verified on google/rex0 and google/rex64 without change: ``` rex-rev3 ~ # elogtool list rex64-rev3 ~ # /media/usb/elogtool list 3 | 2024-01-01 22:25:59-0800 | Firmware CSE sync | Late CSE Sync ``` with change: ``` rex64-rev3 ~ # elogtool list 3 | 2024-12-17 02:22:36-0800 | Firmware CSE sync | Post RAM CSE Sync ```
Change-Id: Ia5db3ffb43b2ceac821de72ef9e88ed62e617d41 Signed-off-by: Dinesh Gehlot digehlot@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/85622 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Karthik Ramasubramanian kramasub@google.com Reviewed-by: Subrata Banik subratabanik@google.com --- M src/commonlib/bsd/include/commonlib/bsd/elog.h M src/soc/intel/common/block/cse/cse_lite.c M util/cbfstool/eventlog.c 3 files changed, 6 insertions(+), 6 deletions(-)
Approvals: Subrata Banik: Looks good to me, approved Karthik Ramasubramanian: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/commonlib/bsd/include/commonlib/bsd/elog.h b/src/commonlib/bsd/include/commonlib/bsd/elog.h index e1c8f5d..f7dc4a1 100644 --- a/src/commonlib/bsd/include/commonlib/bsd/elog.h +++ b/src/commonlib/bsd/include/commonlib/bsd/elog.h @@ -385,8 +385,8 @@ * Events related to CSE sync */ #define ELOG_TYPE_FW_CSE_SYNC 0xbd -#define ELOG_FW_EARLY_CSE_SYNC 0x0 -#define ELOG_FW_LATE_CSE_SYNC 0x1 +#define ELOG_FW_PRE_RAM_CSE_SYNC 0x0 +#define ELOG_FW_POST_RAM_CSE_SYNC 0x1 #define ELOG_FW_CSE_SYNC_AT_PAYLOAD 0x2
/* Only the 7-LSB are used for size */ diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c index 00b5de6..5647a36 100644 --- a/src/soc/intel/common/block/cse/cse_lite.c +++ b/src/soc/intel/common/block/cse/cse_lite.c @@ -806,8 +806,8 @@ return CB_ERR;
printk(BIOS_INFO, "cse_lite: CSE RW Update Successful\n"); - elog_add_event_byte(ELOG_TYPE_FW_CSE_SYNC, ENV_RAMSTAGE ? ELOG_FW_LATE_CSE_SYNC : - ELOG_FW_EARLY_CSE_SYNC); + elog_add_event_byte(ELOG_TYPE_FW_CSE_SYNC, ENV_RAMSTAGE ? ELOG_FW_POST_RAM_CSE_SYNC : + ELOG_FW_PRE_RAM_CSE_SYNC); return CB_SUCCESS; }
diff --git a/util/cbfstool/eventlog.c b/util/cbfstool/eventlog.c index 0227683..b9a3706 100644 --- a/util/cbfstool/eventlog.c +++ b/util/cbfstool/eventlog.c @@ -485,8 +485,8 @@ };
static const struct valstr cse_sync_path_types[] = { - {ELOG_FW_EARLY_CSE_SYNC, "Early CSE Sync"}, - {ELOG_FW_LATE_CSE_SYNC, "Late CSE Sync"}, + {ELOG_FW_PRE_RAM_CSE_SYNC, "Pre-RAM CSE Sync"}, + {ELOG_FW_POST_RAM_CSE_SYNC, "Post-RAM CSE Sync"}, {ELOG_FW_CSE_SYNC_AT_PAYLOAD, "CSE Sync at Payload"}, {0, NULL}, };