Yu-Ping Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83650?usp=email )
Change subject: soc/mediatek/mt8188/memlayout: Fix a space in SRAM_L2C_START comment ......................................................................
soc/mediatek/mt8188/memlayout: Fix a space in SRAM_L2C_START comment
Change-Id: I1888fedcc66ae13c76331d3f2f4465197ae51d35 Signed-off-by: Yu-Ping Wu yupingso@chromium.org --- M src/soc/mediatek/mt8188/include/soc/memlayout.ld 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/83650/1
diff --git a/src/soc/mediatek/mt8188/include/soc/memlayout.ld b/src/soc/mediatek/mt8188/include/soc/memlayout.ld index 3dc386e..732b5ba 100644 --- a/src/soc/mediatek/mt8188/include/soc/memlayout.ld +++ b/src/soc/mediatek/mt8188/include/soc/memlayout.ld @@ -29,7 +29,7 @@
/* * The L3 is 2MB in total. The bootROM has configured half of the L3 cache as SRAM - *(SRAM_L2C) so that's 1MB (and the rest to be cache, which is required so you + * (SRAM_L2C) so that's 1MB (and the rest to be cache, which is required so you * can't reconfigure whole L3 as SRAM). */ SRAM_L2C_START(0x00200000)