Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36591 )
Change subject: superio/aspeed/common: add workaround for serial routing delay quirk ......................................................................
superio/aspeed/common: add workaround for serial routing delay quirk
Some mainboards with an ASPEED BMC do the serial routing setup in the BMC boot phase on cold boot. This results in scrambled console output when this is not finished fast enough.
This adds a delay of 500ms as workaround in the BMCs uart setup that can be selected at mainboard level.
A user may disable the workaround when using another BMC firmware like OpenBMC, u-bmc or some custom BMC bootloader with fast serial setup.
Change-Id: I7d6599b76384fc94a00a9cfc1794ebfe34863ff9 Signed-off-by: Michael Niewöhner foss@mniewoehner.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/36591 Reviewed-by: Arthur Heymans arthur@aheymans.xyz Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/superio/aspeed/common/Kconfig M src/superio/aspeed/common/early_serial.c 2 files changed, 21 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved
diff --git a/src/superio/aspeed/common/Kconfig b/src/superio/aspeed/common/Kconfig index 3f0dabb..f310f3e 100644 --- a/src/superio/aspeed/common/Kconfig +++ b/src/superio/aspeed/common/Kconfig @@ -20,3 +20,20 @@ config SUPERIO_ASPEED_COMMON_PRE_RAM bool default n + +config SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND + bool + default n + +config SUPERIO_ASPEED_USE_UART_DELAY_WORKAROUND + bool "Workaround for BMC serial console setup bug" + depends on CONSOLE_SERIAL && SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND + default y + help + Some mainboards with an ASPEED BMC have scrambled console output in early boot phases + because the serial output routing is not set up fast enough by the BMC. By enabling + this a delay of 500ms gets added before setting up the console and before any console + output gets printed. + + Note: this problem may disappear with future BMC firmware versions. Another approach + is using a different BMC firmware like OpenBMC, u-bmc, ... diff --git a/src/superio/aspeed/common/early_serial.c b/src/superio/aspeed/common/early_serial.c index 7ac9474..d2de8ed 100644 --- a/src/superio/aspeed/common/early_serial.c +++ b/src/superio/aspeed/common/early_serial.c @@ -35,6 +35,7 @@ */
#include <arch/io.h> +#include <delay.h> #include <device/pnp_def.h> #include <device/pnp_ops.h> #include <stdint.h> @@ -67,4 +68,7 @@ pnp_set_iobase(dev, PNP_IDX_IO0, iobase); pnp_set_enable(dev, 1); pnp_exit_conf_state(dev); + + if (CONFIG(SUPERIO_ASPEED_USE_UART_DELAY_WORKAROUND)) + mdelay(500); }