Patch merged into coreboot/master: AMD/spi: Do not reset fifo after skipping the sent bytes

the following patch was just integrated into master:
commit e0849350aa74c58751675da389d717a93c365030
Author: zbao 
Date:   Tue May 24 21:21:26 2016 +0800

AMD/spi: Do not reset fifo after skipping the sent bytes

After we skip the bytes we send, the fifo pointer is at
    right position. Reseting the fifo will change it to a
    wrong place.

Please view the flashrom code, which tells the same thing.
    https://code.coreboot.org/p/flashrom/source/tree/HEAD/trunk/sb600spi.c#L257

Change-Id: I31d487ce32c0d7ca3dead36d2b14611e73b1ad60
    Signed-off-by: Zheng Bao 
    Reviewed-on: https://review.coreboot.org/14955
    Tested-by: build bot (Jenkins)
    Reviewed-by: Martin Roth

See https://review.coreboot.org/14955 for details.

-gerrit