[S] Change in coreboot[master]: soc/intel/common: Fix long delay when ME is disabled

[Sean Rhodes (Code Review)]

Attention is currently required from: Tarun Tuli, Subrata Banik, Paul Menzel, Sridhar Siricilla, Angel Pons.

Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74435 )

Change subject: soc/intel/common: Fix long delay when ME is disabled
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Patch Set 1:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/74435/comment/6232ee0b_44c6a984 
PS1, Line 14: 
            : This is because the current code only checks if the ME is
            : disabled for CSE LITE SKUs. With this patch, boot times are
            : approximately 5 seconds quicker:
> So `cse_is_hfs1_com_soft_temp_disable()` took that long, and is skipped now with your patch from `&& […]

Honeslty, not quite sure exactly why. All cbmem shows is:
[ERROR]  HECI: Prerequisites not met for sending EOP
[ERROR]  HECI: timed out reading answer!
[ERROR]  HECI: Failed to receive!
[DEBUG]  HECI: Trigger HECI Reset
[ERROR]  HECI: Prerequisites not met for sending EOP
[INFO ]  CSE is disabled, continuing boot
[INFO ]  Disabling Heci using PMC IPC