Attention is currently required from: Jason Nien, Martin Roth.
Jon Murphy has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74607 )
Change subject: mb/google/skyrim: Add named GPIO's ......................................................................
mb/google/skyrim: Add named GPIO's
Add named GPIO's to help prevent confusion in GPIO management
BUG=b:278968729 TEST=TIMELESS=1 emerge-...coreboot before and after change compare binaries
Signed-off-by: Jon Murphy jpmurphy@google.com Change-Id: I24a8f7e5bfa9e3e586d4189132f47551202f7d2d --- M src/mainboard/google/skyrim/chromeos.c M src/mainboard/google/skyrim/ec.c M src/mainboard/google/skyrim/port_descriptors.c M src/mainboard/google/skyrim/variants/baseboard/include/baseboard/ec.h M src/mainboard/google/skyrim/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/skyrim/variants/baseboard/smihandler.c M src/mainboard/google/skyrim/variants/baseboard/tpm_tis.c A src/mainboard/google/skyrim/variants/crystaldrift/include/variant/gpio.h A src/mainboard/google/skyrim/variants/frostflow/include/variant/gpio.h M src/mainboard/google/skyrim/variants/markarth/gpio.c A src/mainboard/google/skyrim/variants/markarth/include/variant/gpio.h M src/mainboard/google/skyrim/variants/markarth/port_descriptors.c A src/mainboard/google/skyrim/variants/skyrim/include/variant/gpio.h A src/mainboard/google/skyrim/variants/winterhold/include/variant/gpio.h M src/mainboard/google/skyrim/variants/winterhold/port_descriptors.c M src/mainboard/google/skyrim/verstage.c 17 files changed, 132 insertions(+), 30 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/74607/1
diff --git a/src/mainboard/google/skyrim/chromeos.c b/src/mainboard/google/skyrim/chromeos.c index c65e045..d020c09 100644 --- a/src/mainboard/google/skyrim/chromeos.c +++ b/src/mainboard/google/skyrim/chromeos.c @@ -1,9 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */
-#include <baseboard/gpio.h> #include <boot/coreboot_tables.h> #include <bootmode.h> -#include <gpio.h> +#include <variant/gpio.h> #include <vendorcode/google/chromeos/chromeos.h>
void fill_lb_gpios(struct lb_gpios *gpios) diff --git a/src/mainboard/google/skyrim/ec.c b/src/mainboard/google/skyrim/ec.c index f265cbf..82d3ba9 100644 --- a/src/mainboard/google/skyrim/ec.c +++ b/src/mainboard/google/skyrim/ec.c @@ -4,9 +4,9 @@ #include <amdblocks/smi.h> #include <console/console.h> #include <ec/google/chromeec/ec.h> -#include <gpio.h> #include <soc/smi.h> #include <variant/ec.h> +#include <variant/gpio.h>
static const struct sci_source espi_sci_sources[] = { { diff --git a/src/mainboard/google/skyrim/port_descriptors.c b/src/mainboard/google/skyrim/port_descriptors.c index 80839a0..7d0ab74 100644 --- a/src/mainboard/google/skyrim/port_descriptors.c +++ b/src/mainboard/google/skyrim/port_descriptors.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <variant/gpio.h> #include <baseboard/variants.h> -#include <gpio.h> #include <soc/platform_descriptors.h> #include <types.h>
@@ -35,7 +35,7 @@ .link_hotplug = 3, .link_aspm = ASPM_L1, .link_aspm_L1_1 = true, - .gpio_group_id = GPIO_27, + .gpio_group_id = SD_AUX_RST_SOC_L, .clk_req = CLK_REQ1, }, { /* SSD */ @@ -50,7 +50,7 @@ .link_aspm = ASPM_L1, .link_aspm_L1_1 = true, .link_aspm_L1_2 = true, - .gpio_group_id = GPIO_6, + .gpio_group_id = SSD_AUX_RST_L, .clk_req = CLK_REQ0, }, }; diff --git a/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/ec.h b/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/ec.h index c04cc5b..bc2f334 100644 --- a/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/ec.h +++ b/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/ec.h @@ -5,8 +5,7 @@
#include <ec/ec.h> #include <ec/google/chromeec/ec_commands.h> -#include <baseboard/gpio.h> -#include <gpio.h> +#include <variant/gpio.h>
#define MAINBOARD_EC_SCI_EVENTS \ (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED) \ @@ -73,9 +72,6 @@ /* Enable EC sync interrupt */ #define EC_ENABLE_SYNC_IRQ_GPIO
-/* EC sync irq */ -#define EC_SYNC_IRQ GPIO_84 - /* Enable EC backed PD MCU device in ACPI */ #define EC_ENABLE_PD_MCU_DEVICE
diff --git a/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/gpio.h index eb17eff..24244cb 100644 --- a/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/gpio.h +++ b/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/gpio.h @@ -5,7 +5,73 @@
#include <gpio.h>
+#define SOC_PWR_BTN_L GPIO_0 +#define SYS_RST_ODL GPIO_1 +#define SOC_PCIE_WAKE_L GPIO_2 +#define SOC_PEN_DETECT_ODL GPIO_3 +#define EN_PWR_FP GPIO_4 +#define EN_PP3300_TCHPAD GPIO_5 +#define SSD_AUX_RST_L GPIO_6 +#define WLAN_AUX_RST_L GPIO_7 +#define EN_PWR_WWAN_X GPIO_8 +#define EN_PP3300_WLAN GPIO_9 +#define BT_DISABLE GPIO_10 +#define EC_SOC_WAKE_ODL GPIO_11 +#define SOC_FP_RST_L GPIO_12 +#define USB_FAULT_R_ODL GPIO_16 +#define SOC_SAR_INT_R_L GPIO_17 +#define GSC_SOC_INT_L GPIO_18 +#define SOC_I2C_3_SCL GPIO_19 +#define SOC_I2C_3_SDA GPIO_20 +#define WLAN_DISABLE GPIO_21 +#define ESPI_EC_ALERT_SOC_R_ODL GPIO_22 +#define SOC_AC_PRES GPIO_23 +#define SOC_FP_INT_L GPIO_24 +#define SOC_PCIE_RST0_R_L GPIO_26 +#define SD_AUX_RST_SOC_L GPIO_27 +#define TCHSCR_INT_ODL GPIO_29 +#define ESPI_SOC_CS_EC_R_L GPIO_30 +#define LPC_RST_L_MB GPIO_32 +#define SOC_TCHPAD_INT_ODL GPIO_40 +#define WWAN_RST GPIO_42 +#define SOC_TDP_STRAP GPIO_67 +#define ESPI_SOC_D2_R GPIO_68 +#define ESPI_SOC_D3_R GPIO_69 +#define SOC_DISABLE_DISP_BL_R GPIO_74 +#define TCHSCR_REPORT_EN GPIO_76 +#define ESPI_SOC_CLK_R GPIO_77 +#define EN_PP3300_CAM GPIO_78 +#define ESPI_SOC_D1_R GPIO_80 +#define ESPI_SOC_D0_R GPIO_81 +#define EC_SOC_INT_ODL GPIO_84 +#define RAM_ID_1 GPIO_85 +#define RAM_ID_2 GPIO_89 +#define HP_INT_ODL GPIO_90 +#define RAM_ID_3 GPIO_91 +#define PCIE_0_SSD_CLKREQ_ODL GPIO_92 +#define SOC_I2C_2_SCL GPIO_113 +#define SOC_I2C_2_SDA GPIO_114 +#define PCIE_1_SD_CLKREQ_ODL GPIO_115 +#define PCIE_2_WLAN_CLKREQ_ODL GPIO_116 +#define SOC_FPMCU_BOOT0 GPIO_130 +#define EN_PP3300_TCHSCR GPIO_131 +#define TCHSCR_RST_L GPIO_136 +#define SOC_BIOS_WP_L GPIO_138 +#define EN_SPKR GPIO_139 +#define UART_SOC_TX_FP_RX GPIO_140 +#define UART_DBG_TX_SOC_RX_R GPIO_141 +#define UART_FP_TX_SOC_RX GPIO_142 +#define UART_SOC_TX_DBG_RX_R GPIO_143 +#define RAM_ID_0 GPIO_144 +#define SOC_I2C_0_SCL GPIO_145 +#define SOC_I2C_0_SDA GPIO_146 +#define SOC_I2C_1_SCL GPIO_147 +#define SOC_I2C_1_SDA GPIO_148 + /* SPI Write protect */ -#define CROS_WP_GPIO GPIO_138 +#define CROS_WP_GPIO SOC_BIOS_WP_L + +/* EC sync irq */ +#define EC_SYNC_IRQ EC_SOC_INT_ODL
#endif /* __BASEBOARD_GPIO_H__ */ diff --git a/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h index e49b7c4..bb7c349 100644 --- a/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h @@ -3,7 +3,7 @@ #ifndef __BASEBOARD_VARIANTS_H__ #define __BASEBOARD_VARIANTS_H__
-#include <gpio.h> +#include <variant/gpio.h> #include <soc/pci_devs.h> #include <platform_descriptors.h>
diff --git a/src/mainboard/google/skyrim/variants/baseboard/smihandler.c b/src/mainboard/google/skyrim/variants/baseboard/smihandler.c index ff59b2b..a6aa1ba 100644 --- a/src/mainboard/google/skyrim/variants/baseboard/smihandler.c +++ b/src/mainboard/google/skyrim/variants/baseboard/smihandler.c @@ -6,8 +6,8 @@ #include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/smm.h> #include <elog.h> -#include <gpio.h> #include <variant/ec.h> +#include <variant/gpio.h>
void mainboard_smi_sleep(u8 slp_typ) { diff --git a/src/mainboard/google/skyrim/variants/baseboard/tpm_tis.c b/src/mainboard/google/skyrim/variants/baseboard/tpm_tis.c index 7e513ef..645fd6a 100644 --- a/src/mainboard/google/skyrim/variants/baseboard/tpm_tis.c +++ b/src/mainboard/google/skyrim/variants/baseboard/tpm_tis.c @@ -1,9 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */
#include <security/tpm/tis.h> -#include <gpio.h> +#include <variant/gpio.h>
int tis_plat_irq_status(void) { - return gpio_interrupt_status(GPIO_18); + return gpio_interrupt_status(GSC_SOC_INT_L); } diff --git a/src/mainboard/google/skyrim/variants/crystaldrift/include/variant/gpio.h b/src/mainboard/google/skyrim/variants/crystaldrift/include/variant/gpio.h new file mode 100644 index 0000000..dfaeec3 --- /dev/null +++ b/src/mainboard/google/skyrim/variants/crystaldrift/include/variant/gpio.h @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> diff --git a/src/mainboard/google/skyrim/variants/frostflow/include/variant/gpio.h b/src/mainboard/google/skyrim/variants/frostflow/include/variant/gpio.h new file mode 100644 index 0000000..eb7d1c4 --- /dev/null +++ b/src/mainboard/google/skyrim/variants/frostflow/include/variant/gpio.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> + +/* EN_PWR_WWAN_X(GPIO_8) => CAM_PSW_L */ +#define CAM_PSW_L GPIO_8 + +/* SOC_SAR_INT_L(GPIO_17) => Unused */ +/* WWAN_RST(GPIO_42) => Unused */ diff --git a/src/mainboard/google/skyrim/variants/markarth/gpio.c b/src/mainboard/google/skyrim/variants/markarth/gpio.c index 9753179..f1e1cbc 100644 --- a/src/mainboard/google/skyrim/variants/markarth/gpio.c +++ b/src/mainboard/google/skyrim/variants/markarth/gpio.c @@ -5,18 +5,12 @@
/* GPIO configuration in ramstage */ static const struct soc_amd_gpio override_gpio_table[] = { - - /* SOC_PEN_DETECT_ODL => Unused */ + /* Unused GPIO's for this platform */ PAD_NC(GPIO_3), - /* EN_PWR_FP => Unused */ PAD_NC(GPIO_4), - /* EN_PWR_WWAN_X => Unused */ PAD_NC(GPIO_8), - /* SOC_FP_INT_L => Unused */ PAD_NC(GPIO_24), - /* SD_AUX_RST_SOC_L => Unused */ PAD_NC(GPIO_27), - /* WWAN_RST_L => Unused */ PAD_NC(GPIO_42), };
diff --git a/src/mainboard/google/skyrim/variants/markarth/include/variant/gpio.h b/src/mainboard/google/skyrim/variants/markarth/include/variant/gpio.h new file mode 100644 index 0000000..2daeaa1 --- /dev/null +++ b/src/mainboard/google/skyrim/variants/markarth/include/variant/gpio.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> + +/* SOC_PEN_DETECT_ODL(GPIO_3) => Unused */ +/* EN_PWR_FP(GPIO_4) => Unused */ +/* EN_PWR_WWAN_X(GPIO_8) => Unused */ +/* SOC_FP_INT_L(GPIO_24) => Unused */ +/* SD_AUX_RST_SOC_L(GPIO_27) => Unused */ +/* WWAN_RST(GPIO_42) => Unused */ + +/* PCIE_1_SD_CLKREQ_ODL => PCIE_1_EMMC_CLKREQ_ODL */ +#define PCIE_1_EMMC_CLKREQ_ODL GPIO_115 diff --git a/src/mainboard/google/skyrim/variants/markarth/port_descriptors.c b/src/mainboard/google/skyrim/variants/markarth/port_descriptors.c index 330fc46..9e2702f 100644 --- a/src/mainboard/google/skyrim/variants/markarth/port_descriptors.c +++ b/src/mainboard/google/skyrim/variants/markarth/port_descriptors.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <variant/gpio.h> #include <baseboard/variants.h> #include <console/console.h> -#include <gpio.h> #include <soc/platform_descriptors.h> #include <types.h>
@@ -35,7 +35,7 @@ .link_aspm = ASPM_L1, .link_aspm_L1_1 = true, .link_aspm_L1_2 = true, - .gpio_group_id = GPIO_6, + .gpio_group_id = SSD_AUX_RST_L, .clk_req = CLK_REQ1, }, }; @@ -69,7 +69,7 @@ .link_aspm = ASPM_L1, .link_aspm_L1_1 = true, .link_aspm_L1_2 = true, - .gpio_group_id = GPIO_6, + .gpio_group_id = SSD_AUX_RST_L, .clk_req = CLK_REQ0, }, }; diff --git a/src/mainboard/google/skyrim/variants/skyrim/include/variant/gpio.h b/src/mainboard/google/skyrim/variants/skyrim/include/variant/gpio.h new file mode 100644 index 0000000..dfaeec3 --- /dev/null +++ b/src/mainboard/google/skyrim/variants/skyrim/include/variant/gpio.h @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> diff --git a/src/mainboard/google/skyrim/variants/winterhold/include/variant/gpio.h b/src/mainboard/google/skyrim/variants/winterhold/include/variant/gpio.h new file mode 100644 index 0000000..dfaeec3 --- /dev/null +++ b/src/mainboard/google/skyrim/variants/winterhold/include/variant/gpio.h @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> diff --git a/src/mainboard/google/skyrim/variants/winterhold/port_descriptors.c b/src/mainboard/google/skyrim/variants/winterhold/port_descriptors.c index 330fc46..9e2702f 100644 --- a/src/mainboard/google/skyrim/variants/winterhold/port_descriptors.c +++ b/src/mainboard/google/skyrim/variants/winterhold/port_descriptors.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <variant/gpio.h> #include <baseboard/variants.h> #include <console/console.h> -#include <gpio.h> #include <soc/platform_descriptors.h> #include <types.h>
@@ -35,7 +35,7 @@ .link_aspm = ASPM_L1, .link_aspm_L1_1 = true, .link_aspm_L1_2 = true, - .gpio_group_id = GPIO_6, + .gpio_group_id = SSD_AUX_RST_L, .clk_req = CLK_REQ1, }, }; @@ -69,7 +69,7 @@ .link_aspm = ASPM_L1, .link_aspm_L1_1 = true, .link_aspm_L1_2 = true, - .gpio_group_id = GPIO_6, + .gpio_group_id = SSD_AUX_RST_L, .clk_req = CLK_REQ0, }, }; diff --git a/src/mainboard/google/skyrim/verstage.c b/src/mainboard/google/skyrim/verstage.c index 1079e9b..8a9a2cc 100644 --- a/src/mainboard/google/skyrim/verstage.c +++ b/src/mainboard/google/skyrim/verstage.c @@ -3,11 +3,11 @@ #include <amdblocks/acpimmio.h> #include <arch/io.h> #include <baseboard/variants.h> -#include <gpio.h> #include <psp_verstage.h> #include <security/vboot/vboot_common.h> #include <soc/espi.h> #include <soc/southbridge.h> +#include <variant/gpio.h>
void verstage_mainboard_early_init(void) {
-
Jon Murphy (Code Review)