[XS] Change in coreboot[main]: soc/amd: Ensure bank 0 is selected before accessing VBNV in CMOS

[Karthik Ramasubramanian (Code Review)]

Attention is currently required from: Bao Zheng, Felix Held, Fred Reitberger, Jason Glenesk, Jérémy Compostella, Matt DeVillier, Yu-Ping Wu.

Karthik Ramasubramanian has posted comments on this change by Yu-Ping Wu. ( https://review.coreboot.org/c/coreboot/+/83495?usp=email )

Change subject: soc/amd: Ensure bank 0 is selected before accessing VBNV in CMOS
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Patch Set 5:

(1 comment)

File src/soc/amd/common/vboot/vbnv_cmos.c:

https://review.coreboot.org/c/coreboot/+/83495/comment/3c20a394_17122777?usp... :
PS4, Line 16: cmos_write(RTC_FREQ_SELECT_AMD, RTC_FREQ_SELECT);
> Also the issue is happening only in MonkeyIsland and not on Zork(prior generation) or Skyrim(later generation).

Cezanne seems to have the smallest PSP SRAM size allocated for verstage among all the AMD programs.

Picasso(Zork) - 160 KiB (116 KiB for text, data, bss + 44 KiB for stack)
Cezanne(Guybrush) - 148 KiB (108 KiB for text, data, bass + 40 KiB for stack)
Mendocino(Skyrim) - 208 KiB (168 KiB for text, data, bss + 40 KiB for stack)

That probably is the reason why we are facing this error in Cezanne.