Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47529 )
Change subject: mb/google/zork: Assume VBOOT_STARTS_BEFORE_BOOTBLOCK ......................................................................
mb/google/zork: Assume VBOOT_STARTS_BEFORE_BOOTBLOCK
At this point, the zork platform will only use psp_verstage, so remove the VBOOT_STARTS_IN_BOOTBLOCK option and set code for VBOOT_STARTS- BEFORE_BOOTBLOCK to always be used.
TEST=Build & Boot Morphius BRANCH=Zork BUG=b:172848137
Signed-off-by: Martin Roth martin@coreboot.org Change-Id: I30d90fe82c37966a860b52c07a3550dcecf8d19d --- M src/mainboard/google/zork/Kconfig M src/mainboard/google/zork/Makefile.inc M src/mainboard/google/zork/bootblock.c M src/mainboard/google/zork/variants/baseboard/Makefile.inc 4 files changed, 3 insertions(+), 29 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/47529/1
diff --git a/src/mainboard/google/zork/Kconfig b/src/mainboard/google/zork/Kconfig index 320f668..0bad802 100644 --- a/src/mainboard/google/zork/Kconfig +++ b/src/mainboard/google/zork/Kconfig @@ -105,6 +105,7 @@ config VBOOT select EC_GOOGLE_CHROMEEC_SWITCHES select VBOOT_LID_SWITCH + select VBOOT_STARTS_BEFORE_BOOTBLOCK
config VBOOT_VBNV_OFFSET hex @@ -129,7 +130,7 @@ config PICASSO_FW_A_POSITION hex default 0xFF012040 - depends on VBOOT_SLOTS_RW_AB && VBOOT_STARTS_BEFORE_BOOTBLOCK + depends on VBOOT_SLOTS_RW_AB help Location of the AMD firmware in the RW_A region. This is the start of the RW-A region + 64 bytes for the cbfs header. @@ -137,7 +138,7 @@ config PICASSO_FW_B_POSITION hex default 0xFF312040 - depends on VBOOT_SLOTS_RW_AB && VBOOT_STARTS_BEFORE_BOOTBLOCK + depends on VBOOT_SLOTS_RW_AB help Location of the AMD firmware in the RW_B region. This is the start of the RW-A region + 64 bytes for the cbfs header. @@ -241,22 +242,6 @@ help Last board version that needs the extra delay for FPMCU init.
-config VBOOT_STARTS_BEFORE_BOOTBLOCK - bool "PSP verstage" - default y if VBOOT - help - Firmware verification happens before the main processor is brought - online. - -config VBOOT_STARTS_IN_BOOTBLOCK - bool "X86 verstage (in bootblock)" - depends on VBOOT && ! VBOOT_STARTS_BEFORE_BOOTBLOCK - select VBOOT_SEPARATE_VERSTAGE - help - Firmware verification happens during the end of or right after the - bootblock. This implies that a static VBOOT2_WORK() buffer must be - allocated in memlayout. - config EFS_SPI_READ_MODE int default 0 if EM100 # Normal read mode diff --git a/src/mainboard/google/zork/Makefile.inc b/src/mainboard/google/zork/Makefile.inc index 88aef86..96c97b6 100644 --- a/src/mainboard/google/zork/Makefile.inc +++ b/src/mainboard/google/zork/Makefile.inc @@ -9,11 +9,7 @@ ramstage-y += ec.c ramstage-y += sku_id.c
-ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y) verstage-y += verstage.c -else -verstage-y += chromeos.c -endif
smm-y += smihandler.c
diff --git a/src/mainboard/google/zork/bootblock.c b/src/mainboard/google/zork/bootblock.c index ed05888..87e0285 100644 --- a/src/mainboard/google/zork/bootblock.c +++ b/src/mainboard/google/zork/bootblock.c @@ -12,10 +12,5 @@ gpios = variant_bootblock_gpio_table(&num_gpios, acpi_get_sleep_type()); program_gpios(gpios, num_gpios);
- if (!CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)) { - gpios = variant_early_gpio_table(&num_gpios); - program_gpios(gpios, num_gpios); - } - variant_pcie_gpio_configure(); } diff --git a/src/mainboard/google/zork/variants/baseboard/Makefile.inc b/src/mainboard/google/zork/variants/baseboard/Makefile.inc index c8d57ff..2764a89 100644 --- a/src/mainboard/google/zork/variants/baseboard/Makefile.inc +++ b/src/mainboard/google/zork/variants/baseboard/Makefile.inc @@ -7,10 +7,8 @@
verstage-y += gpio_baseboard_common.c verstage-y += helpers.c -ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y) verstage-$(CONFIG_BOARD_GOOGLE_BASEBOARD_TREMBYLE) += gpio_baseboard_trembyle.c verstage-$(CONFIG_BOARD_GOOGLE_BASEBOARD_DALBOZ) += gpio_baseboard_dalboz.c -endif verstage-y += tpm_tis.c
romstage-y += gpio_baseboard_common.c
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47529 )
Change subject: mb/google/zork: Assume VBOOT_STARTS_BEFORE_BOOTBLOCK ......................................................................
Patch Set 1: Code-Review+2
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47529 )
Change subject: mb/google/zork: Assume VBOOT_STARTS_BEFORE_BOOTBLOCK ......................................................................
mb/google/zork: Assume VBOOT_STARTS_BEFORE_BOOTBLOCK
At this point, the zork platform will only use psp_verstage, so remove the VBOOT_STARTS_IN_BOOTBLOCK option and set code for VBOOT_STARTS- BEFORE_BOOTBLOCK to always be used.
TEST=Build & Boot Morphius BRANCH=Zork BUG=b:172848137
Signed-off-by: Martin Roth martin@coreboot.org Change-Id: I30d90fe82c37966a860b52c07a3550dcecf8d19d Reviewed-on: https://review.coreboot.org/c/coreboot/+/47529 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com --- M src/mainboard/google/zork/Kconfig M src/mainboard/google/zork/Makefile.inc M src/mainboard/google/zork/bootblock.c M src/mainboard/google/zork/variants/baseboard/Makefile.inc 4 files changed, 3 insertions(+), 29 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/mainboard/google/zork/Kconfig b/src/mainboard/google/zork/Kconfig index 041a4e7..a0606cc 100644 --- a/src/mainboard/google/zork/Kconfig +++ b/src/mainboard/google/zork/Kconfig @@ -105,6 +105,7 @@ config VBOOT select EC_GOOGLE_CHROMEEC_SWITCHES select VBOOT_LID_SWITCH + select VBOOT_STARTS_BEFORE_BOOTBLOCK
config VBOOT_VBNV_OFFSET hex @@ -129,7 +130,7 @@ config PICASSO_FW_A_POSITION hex default 0xFF012040 - depends on VBOOT_SLOTS_RW_AB && VBOOT_STARTS_BEFORE_BOOTBLOCK + depends on VBOOT_SLOTS_RW_AB help Location of the AMD firmware in the RW_A region. This is the start of the RW-A region + 64 bytes for the cbfs header. @@ -137,7 +138,7 @@ config PICASSO_FW_B_POSITION hex default 0xFF312040 - depends on VBOOT_SLOTS_RW_AB && VBOOT_STARTS_BEFORE_BOOTBLOCK + depends on VBOOT_SLOTS_RW_AB help Location of the AMD firmware in the RW_B region. This is the start of the RW-A region + 64 bytes for the cbfs header. @@ -241,22 +242,6 @@ help Last board version that needs the extra delay for FPMCU init.
-config VBOOT_STARTS_BEFORE_BOOTBLOCK - bool "PSP verstage" - default y if VBOOT - help - Firmware verification happens before the main processor is brought - online. - -config VBOOT_STARTS_IN_BOOTBLOCK - bool "X86 verstage (in bootblock)" - depends on VBOOT && ! VBOOT_STARTS_BEFORE_BOOTBLOCK - select VBOOT_SEPARATE_VERSTAGE - help - Firmware verification happens during the end of or right after the - bootblock. This implies that a static VBOOT2_WORK() buffer must be - allocated in memlayout. - config EFS_SPI_READ_MODE int default 0 if EM100 # Normal read mode diff --git a/src/mainboard/google/zork/Makefile.inc b/src/mainboard/google/zork/Makefile.inc index 88aef86..96c97b6 100644 --- a/src/mainboard/google/zork/Makefile.inc +++ b/src/mainboard/google/zork/Makefile.inc @@ -9,11 +9,7 @@ ramstage-y += ec.c ramstage-y += sku_id.c
-ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y) verstage-y += verstage.c -else -verstage-y += chromeos.c -endif
smm-y += smihandler.c
diff --git a/src/mainboard/google/zork/bootblock.c b/src/mainboard/google/zork/bootblock.c index ed05888..87e0285 100644 --- a/src/mainboard/google/zork/bootblock.c +++ b/src/mainboard/google/zork/bootblock.c @@ -12,10 +12,5 @@ gpios = variant_bootblock_gpio_table(&num_gpios, acpi_get_sleep_type()); program_gpios(gpios, num_gpios);
- if (!CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)) { - gpios = variant_early_gpio_table(&num_gpios); - program_gpios(gpios, num_gpios); - } - variant_pcie_gpio_configure(); } diff --git a/src/mainboard/google/zork/variants/baseboard/Makefile.inc b/src/mainboard/google/zork/variants/baseboard/Makefile.inc index c8d57ff..2764a89 100644 --- a/src/mainboard/google/zork/variants/baseboard/Makefile.inc +++ b/src/mainboard/google/zork/variants/baseboard/Makefile.inc @@ -7,10 +7,8 @@
verstage-y += gpio_baseboard_common.c verstage-y += helpers.c -ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y) verstage-$(CONFIG_BOARD_GOOGLE_BASEBOARD_TREMBYLE) += gpio_baseboard_trembyle.c verstage-$(CONFIG_BOARD_GOOGLE_BASEBOARD_DALBOZ) += gpio_baseboard_dalboz.c -endif verstage-y += tpm_tis.c
romstage-y += gpio_baseboard_common.c
-
Felix Held (Code Review) -
Furquan Shaikh (Code Review)
-
Martin Roth (Code Review)