Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75564?usp=email )
Change subject: soc/amd/common/acpi: move acpi_fill_root_complex_tom to Stoneyridge
......................................................................
Patch Set 6: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75564/comment/7a475b42_32e4fdf7 :
PS6, Line 9: Now that Stoneyridge is the only AMD SoC that still needs the part of
: the SSDT that contains the TOM1 and TOM2, move it from the common code
: to the Stoneyridge northbridge code.
sidenote: HT is quite similar to how DF works with regards to what is getting decoded (Bus, MMIO, IO) by the root bridge. Would it be a good idea to add a TODO in the code?
--
To view, visit
https://review.coreboot.org/c/coreboot/+/75564?usp=email
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I9091360d6a82183092ef75417ad652523babe075
Gerrit-Change-Number: 75564
Gerrit-PatchSet: 6
Gerrit-Owner: Felix Held
felix-coreboot@felixheld.de
Gerrit-Reviewer: Arthur Heymans
arthur@aheymans.xyz
Gerrit-Reviewer: Fred Reitberger
reitbergerfred@gmail.com
Gerrit-Reviewer: Jason Glenesk
jason.glenesk@gmail.com
Gerrit-Reviewer: Matt DeVillier
matt.devillier@amd.corp-partner.google.com
Gerrit-Reviewer: Raul Rangel
rrangel@chromium.org
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-Attention: Jason Glenesk
jason.glenesk@gmail.com
Gerrit-Attention: Matt DeVillier
matt.devillier@amd.corp-partner.google.com
Gerrit-Attention: Fred Reitberger
reitbergerfred@gmail.com
Gerrit-Attention: Felix Held
felix-coreboot@felixheld.de
Gerrit-Comment-Date: Tue, 06 Jun 2023 19:21:47 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment