Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36128 )
Change subject: mb/lenovo/x201/dock.c: Use common southbridge gpio code ......................................................................
mb/lenovo/x201/dock.c: Use common southbridge gpio code
Change-Id: I885f57f68e30c2a641e84655dc7ea9da141fb83f Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/lenovo/x201/dock.c 1 file changed, 6 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/36128/1
diff --git a/src/mainboard/lenovo/x201/dock.c b/src/mainboard/lenovo/x201/dock.c index 04050f2..652a144 100644 --- a/src/mainboard/lenovo/x201/dock.c +++ b/src/mainboard/lenovo/x201/dock.c @@ -15,18 +15,14 @@ * GNU General Public License for more details. */
-#define __SIMPLE_DEVICE__ #include <console/console.h> -#include <arch/io.h> -#include <device/pci_ops.h> #include <device/device.h> -#include <device/pci.h> #include "dock.h" -#include <southbridge/intel/ibexpeak/pch.h> +#include <southbridge/intel/common/gpio.h> #include <ec/lenovo/h8/h8.h> #include <ec/acpi/ec.h>
-void h8_mainboard_init_dock (void) +void h8_mainboard_init_dock(void) { if (dock_present()) { printk(BIOS_DEBUG, "dock is connected\n"); @@ -37,30 +33,25 @@
void dock_connect(void) { - u16 gpiobase = pci_read_config16(PCH_LPC_DEV, GPIO_BASE) & 0xfffc; - ec_set_bit(0x02, 0); ec_set_bit(0x1a, 0); ec_set_bit(0xfe, 4);
- outl(inl(gpiobase + 0x0c) | (1 << 28), gpiobase + 0x0c); + set_gpio(28, GPIO_LEVEL_HIGH); }
void dock_disconnect(void) { - u16 gpiobase = pci_read_config16(PCH_LPC_DEV, GPIO_BASE) & 0xfffc; - ec_clr_bit(0x02, 0); ec_clr_bit(0x1a, 0); ec_clr_bit(0xfe, 4);
- outl(inl(gpiobase + 0x0c) & ~(1 << 28), gpiobase + 0x0c); + set_gpio(28, GPIO_LEVEL_LOW); }
int dock_present(void) { - u16 gpiobase = pci_read_config16(PCH_LPC_DEV, GPIO_BASE) & 0xfffc; - u8 st = inb(gpiobase + 0x0c); + const int dock_id_gpio[] = { 3, 4, 5, -1};
- return ((st >> 3) & 7) != 7; + return get_gpios(dock_id_gpio) != 7; }
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36128 )
Change subject: mb/lenovo/x201/dock.c: Use common southbridge gpio code ......................................................................
Patch Set 1: Code-Review+2
Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36128 )
Change subject: mb/lenovo/x201/dock.c: Use common southbridge gpio code ......................................................................
mb/lenovo/x201/dock.c: Use common southbridge gpio code
Change-Id: I885f57f68e30c2a641e84655dc7ea9da141fb83f Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/36128 Reviewed-by: Patrick Rudolph siro@das-labor.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/lenovo/x201/dock.c 1 file changed, 6 insertions(+), 15 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Rudolph: Looks good to me, approved
diff --git a/src/mainboard/lenovo/x201/dock.c b/src/mainboard/lenovo/x201/dock.c index 04050f2..652a144 100644 --- a/src/mainboard/lenovo/x201/dock.c +++ b/src/mainboard/lenovo/x201/dock.c @@ -15,18 +15,14 @@ * GNU General Public License for more details. */
-#define __SIMPLE_DEVICE__ #include <console/console.h> -#include <arch/io.h> -#include <device/pci_ops.h> #include <device/device.h> -#include <device/pci.h> #include "dock.h" -#include <southbridge/intel/ibexpeak/pch.h> +#include <southbridge/intel/common/gpio.h> #include <ec/lenovo/h8/h8.h> #include <ec/acpi/ec.h>
-void h8_mainboard_init_dock (void) +void h8_mainboard_init_dock(void) { if (dock_present()) { printk(BIOS_DEBUG, "dock is connected\n"); @@ -37,30 +33,25 @@
void dock_connect(void) { - u16 gpiobase = pci_read_config16(PCH_LPC_DEV, GPIO_BASE) & 0xfffc; - ec_set_bit(0x02, 0); ec_set_bit(0x1a, 0); ec_set_bit(0xfe, 4);
- outl(inl(gpiobase + 0x0c) | (1 << 28), gpiobase + 0x0c); + set_gpio(28, GPIO_LEVEL_HIGH); }
void dock_disconnect(void) { - u16 gpiobase = pci_read_config16(PCH_LPC_DEV, GPIO_BASE) & 0xfffc; - ec_clr_bit(0x02, 0); ec_clr_bit(0x1a, 0); ec_clr_bit(0xfe, 4);
- outl(inl(gpiobase + 0x0c) & ~(1 << 28), gpiobase + 0x0c); + set_gpio(28, GPIO_LEVEL_LOW); }
int dock_present(void) { - u16 gpiobase = pci_read_config16(PCH_LPC_DEV, GPIO_BASE) & 0xfffc; - u8 st = inb(gpiobase + 0x0c); + const int dock_id_gpio[] = { 3, 4, 5, -1};
- return ((st >> 3) & 7) != 7; + return get_gpios(dock_id_gpio) != 7; }