Change in coreboot[master]: soc/amd/cezanne,vc/cezanne: Implement svc_write_postcode

[Raul Rangel (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held.
Hello build bot (Jenkins), Jason Glenesk, Marshall Dawson, Kangheui Won, Karthik Ramasubramanian, Felix Held,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/61522

to look at the new patch set (#3).

Change subject: soc/amd/cezanne,vc/cezanne: Implement svc_write_postcode
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soc/amd/cezanne,vc/cezanne: Implement svc_write_postcode

This will allow verstage to write post codes.

BUG=b:215425753
TEST=Boot guybrush and verify PSP post codes are printed
22-01-31 15:12:03.214 (S3->S0)
22-01-31 15:12:03.214   03 04 0f 0e f0 f1 f2 01 10 a0 a2 <--new

Signed-off-by: Raul E Rangel 
Change-Id: I6ceee8fcb094f462de99c07aef8e96425d9c3270
---
M src/soc/amd/cezanne/psp_verstage/chipset.c
M src/soc/amd/cezanne/psp_verstage/svc.c
M src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h
3 files changed, 8 insertions(+), 10 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/61522/3