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Subrata Banik has posted comments on this change by Sowmya Aralguppe. ( https://review.coreboot.org/c/coreboot/+/83752?usp=email )
Change subject: mb/google/brox: Fix booting to kernel without battery
......................................................................
Patch Set 14:
(3 comments)
File src/mainboard/google/brox/romstage.c:
https://review.coreboot.org/c/coreboot/+/83752/comment/3d426403_824dffa1?usp... :
PS14, Line 27: /* Sets the boot frequency starting from reset vector:
align w/ one more tab ?
https://review.coreboot.org/c/coreboot/+/83752/comment/0ec8d54a_5afe7239?usp... :
PS14, Line 32: FSPM_MAX_NONTURBO_FREQ
can you please check what is the CPU debug soft-strap configuration? are you not booting by default using HFM (aka non-turbo max freq)? if not then why?
Ideally you should be always booting using HFM freq and only fall back (override the BootFrequency UPD) if battery is critically low. As you have experience that low-battery case is rare hence, make sense always boot using HFM and only fallback when we are in critical battery scenario. In such special case, system will hit a reset from FSP-M and then be able to override the CPU strap (to non-HFM freq). Because this override of BootFrequency is not sticky and will reset when we issue a cold/global reset.
I also hope that CSE sync is not at ramstage for Brox and happening before FSP-M at romstage, otherwise, we will experience few time additional resets due to overriding BootFrequency UPD.
File src/soc/intel/alderlake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/83752/comment/73965f2a_62a1c8ba?usp... :
PS8, Line 365: BootFrequency
In CPU soft strap I can see only processor boot at p1 frequency which is set as yes
that means, at reset BSP is always at non-Turbo max aka HFM freq
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