Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43196 )
Change subject: soc/intel/baytrail/sd.c: Align with Braswell ......................................................................
soc/intel/baytrail/sd.c: Align with Braswell
This reduces the differences between Bay Trail and Braswell.
Tested with BUILD_TIMELESS=1, Google Ninja remains identical.
Change-Id: I08ccbc70744a17d589450e321a3ed77d9a56492f Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/baytrail/sd.c 1 file changed, 6 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/43196/1
diff --git a/src/soc/intel/baytrail/sd.c b/src/soc/intel/baytrail/sd.c index 57cd8f4..34a9031 100644 --- a/src/soc/intel/baytrail/sd.c +++ b/src/soc/intel/baytrail/sd.c @@ -12,9 +12,9 @@ #include <soc/ramstage.h> #include "chip.h"
-#define CAP_OVERRIDE_LOW 0xa0 -#define CAP_OVERRIDE_HIGH 0xa4 -# define USE_CAP_OVERRIDES (1 << 31) +#define CAP_OVERRIDE_LOW 0xa0 +#define CAP_OVERRIDE_HIGH 0xa4 +#define USE_CAP_OVERRIDES (1 << 31)
static void sd_init(struct device *dev) { @@ -22,10 +22,9 @@
if (config->sdcard_cap_low != 0 || config->sdcard_cap_high != 0) { printk(BIOS_DEBUG, "Overriding SD Card controller caps.\n"); - pci_write_config32(dev, CAP_OVERRIDE_LOW, - config->sdcard_cap_low); - pci_write_config32(dev, CAP_OVERRIDE_HIGH, - config->sdcard_cap_high | USE_CAP_OVERRIDES); + pci_write_config32(dev, CAP_OVERRIDE_LOW, config->sdcard_cap_low); + pci_write_config32(dev, CAP_OVERRIDE_HIGH, config->sdcard_cap_high | + USE_CAP_OVERRIDES); }
if (config->scc_acpi_mode)
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43196 )
Change subject: soc/intel/baytrail/sd.c: Align with Braswell ......................................................................
Patch Set 2: Code-Review+2
oh whitespace, ye be the bane of our existence
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43196 )
Change subject: soc/intel/baytrail/sd.c: Align with Braswell ......................................................................
soc/intel/baytrail/sd.c: Align with Braswell
This reduces the differences between Bay Trail and Braswell.
Tested with BUILD_TIMELESS=1, Google Ninja remains identical.
Change-Id: I08ccbc70744a17d589450e321a3ed77d9a56492f Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/43196 Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/baytrail/sd.c 1 file changed, 6 insertions(+), 7 deletions(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/soc/intel/baytrail/sd.c b/src/soc/intel/baytrail/sd.c index 57cd8f4..34a9031 100644 --- a/src/soc/intel/baytrail/sd.c +++ b/src/soc/intel/baytrail/sd.c @@ -12,9 +12,9 @@ #include <soc/ramstage.h> #include "chip.h"
-#define CAP_OVERRIDE_LOW 0xa0 -#define CAP_OVERRIDE_HIGH 0xa4 -# define USE_CAP_OVERRIDES (1 << 31) +#define CAP_OVERRIDE_LOW 0xa0 +#define CAP_OVERRIDE_HIGH 0xa4 +#define USE_CAP_OVERRIDES (1 << 31)
static void sd_init(struct device *dev) { @@ -22,10 +22,9 @@
if (config->sdcard_cap_low != 0 || config->sdcard_cap_high != 0) { printk(BIOS_DEBUG, "Overriding SD Card controller caps.\n"); - pci_write_config32(dev, CAP_OVERRIDE_LOW, - config->sdcard_cap_low); - pci_write_config32(dev, CAP_OVERRIDE_HIGH, - config->sdcard_cap_high | USE_CAP_OVERRIDES); + pci_write_config32(dev, CAP_OVERRIDE_LOW, config->sdcard_cap_low); + pci_write_config32(dev, CAP_OVERRIDE_HIGH, config->sdcard_cap_high | + USE_CAP_OVERRIDES); }
if (config->scc_acpi_mode)
-
Angel Pons (Code Review) -
Tim Wawrzynczak (Code Review)