Change in coreboot[master]: drivers/intel/fsp2_0: Add support for FSP runs in long mode (x86_64)

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59744 )

Change subject: drivers/intel/fsp2_0: Add support for FSP runs in long mode (x86_64)
......................................................................

drivers/intel/fsp2_0: Add support for FSP runs in long mode (x86_64)

Add new Kconfig `PLATFORM_USES_FSP2_X86_64` to mark FSP binarycapable of
running in x86_64 mode. Fix the compilation issue by addingrequired FSP
headers to make the code compiled with`HAVE_EXP_X86_64_SUPPORT` Kconfig
enabled.

TEST=Verified on Intel Alder Lake with experimental 64-bit support FSP.h

Change-Id: If12b63a282c660da6f57fe23b0b848e2d155853f
Signed-off-by: Subrata Banik 
---
M src/drivers/intel/fsp2_0/Kconfig
M src/drivers/intel/fsp2_0/include/fsp/info_header.h
M src/vendorcode/intel/edk2/UDK2017/IntelFsp2Pkg/Include/FspEas/FspApi.h
3 files changed, 67 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/59744/1

diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
index a0e02a8..58da9b4 100644
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -33,10 +33,18 @@

config PLATFORM_USES_FSP2_X86_32
    bool
-	default y
+	default y if !HAVE_EXP_X86_64_SUPPORT
+	default n
    help
      The FSP 2.0 runs in x86_32 protected mode.
-	  Once there's a x86_64 FSP this needs to default to n.
+
+config PLATFORM_USES_FSP2_X86_64
+	bool
+	depends on HAVE_EXP_X86_64_SUPPORT
+	default y if HAVE_EXP_X86_64_SUPPORT
+	default n
+	help
+	  Select when FSP 2.0 runs in x86_64 long mode.

config HAVE_INTEL_FSP_REPO
    bool
diff --git a/src/drivers/intel/fsp2_0/include/fsp/info_header.h b/src/drivers/intel/fsp2_0/include/fsp/info_header.h
index 5b6318c..23b48ff 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/info_header.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/info_header.h
@@ -31,7 +31,24 @@
    uint8_t revision;
 } __packed;
 #else
-#error You need to implement this struct for x86_64 FSP
+struct fsp_header {
+	uint32_t fsp_revision;
+	uint64_t image_size;
+	uint64_t image_base;
+	uint16_t image_attribute;
+	uint8_t spec_version;
+	uint16_t component_attribute;
+	uint64_t cfg_region_offset;
+	uint64_t cfg_region_size;
+	uint64_t temp_ram_init_entry;
+	uint64_t temp_ram_exit_entry;
+	uint64_t notify_phase_entry_offset;
+	uint64_t memory_init_entry_offset;
+	uint64_t silicon_init_entry_offset;
+	uint64_t multi_phase_si_init_entry_offset;
+	char image_id[sizeof(uint64_t) + 1];
+	uint8_t revision;
+} __packed;
 #endif

diff --git a/src/vendorcode/intel/edk2/UDK2017/IntelFsp2Pkg/Include/FspEas/FspApi.h b/src/vendorcode/intel/edk2/UDK2017/IntelFsp2Pkg/Include/FspEas/FspApi.h
index c22b701..4146369 100644
--- a/src/vendorcode/intel/edk2/UDK2017/IntelFsp2Pkg/Include/FspEas/FspApi.h
+++ b/src/vendorcode/intel/edk2/UDK2017/IntelFsp2Pkg/Include/FspEas/FspApi.h
@@ -91,7 +91,45 @@
   UINT8                       Reserved1[8];
 } FSPM_ARCH_UPD;
 #else
-#error You need to implement this struct for x86_64 FSP
+//
+/// FSPM_ARCH_UPD Configuration.
+///
+typedef struct {
+  ///
+  /// Revision of the structure. For FSP v2.0 value is 1.
+  ///
+  UINT8                       Revision;
+  UINT8                       Reserved[3];
+  ///
+  /// Pointer to the non-volatile storage (NVS) data buffer.
+  /// If it is NULL it indicates the NVS data is not available.
+  ///
+  /// Note: This ought to be VOID*, but that won't allow calling this binary on x86_64.
+  ///
+  UINT64                      NvsBufferPtr;
+  ///
+  /// Pointer to the temporary stack base address to be
+  /// consumed inside FspMemoryInit() API.
+  ///
+  /// Note: This ought to be VOID*, but that won't allow calling this binary on x86_64.
+  ///
+  UINT64                      StackBase;
+  ///
+  /// Temporary stack size to be consumed inside
+  /// FspMemoryInit() API.
+  ///
+  UINT32                      StackSize;
+  ///
+  /// Size of memory to be reserved by FSP below "top
+  /// of low usable memory" for bootloader usage.
+  ///
+  UINT32                      BootLoaderTolumSize;
+  ///
+  /// Current boot mode.
+  ///
+  UINT32                      BootMode;
+  UINT8                       Reserved1[8];
+} FSPM_ARCH_UPD;
 #endif

///