Change in coreboot[master]: [WIP] include/cpu/x86/msr: move MC0_CTL_MASK to soc/amd/stoneyridge

[Felix Held (Code Review)]

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56246 )

Change subject: [WIP] include/cpu/x86/msr: move MC0_CTL_MASK to soc/amd/stoneyridge
......................................................................

[WIP] include/cpu/x86/msr: move MC0_CTL_MASK to soc/amd/stoneyridge

This MSR isn't an architectural MSR, so it shouldn't be in the common
x86 MSR definition header file.

TODO: Only stoneyridge is using this right now, but it's likely also
present in other pre-Zen AMD CPUs/APUs.

Change-Id: Id11d942876da217034e6f912b1058f00bd15c22c
Signed-off-by: Felix Held 
---
M src/include/cpu/x86/msr.h
A src/soc/amd/stoneyridge/include/soc/msr.h
M src/soc/amd/stoneyridge/mca.c
3 files changed, 9 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/56246/1

diff --git a/src/include/cpu/x86/msr.h b/src/include/cpu/x86/msr.h
index dd969d7..2e0dabf 100644
--- a/src/include/cpu/x86/msr.h
+++ b/src/include/cpu/x86/msr.h
@@ -83,7 +83,6 @@
 #define IA32_VMX_BASIC_MSR              0x480
 #define  VMX_BASIC_HI_DUAL_MONITOR      (1UL << (49 - 32))
 #define IA32_VMX_MISC_MSR               0x485
-#define MC0_CTL_MASK			0xC0010044

#define IA32_PM_ENABLE			0x770
 #define IA32_HWP_CAPABILITIES		0x771
diff --git a/src/soc/amd/stoneyridge/include/soc/msr.h b/src/soc/amd/stoneyridge/include/soc/msr.h
new file mode 100644
index 0000000..c51c31d
--- /dev/null
+++ b/src/soc/amd/stoneyridge/include/soc/msr.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef AMD_STONEYRIDGE_MSR_H
+#define AMD_STONEYRIDGE_MSR_H
+
+#define MC0_CTL_MASK			0xC0010044
+
+#endif /* AMD_STONEYRIDGE_MSR_H */
diff --git a/src/soc/amd/stoneyridge/mca.c b/src/soc/amd/stoneyridge/mca.c
index 0773101..00e6fb9 100644
--- a/src/soc/amd/stoneyridge/mca.c
+++ b/src/soc/amd/stoneyridge/mca.c
@@ -5,6 +5,7 @@
 #include <cpu/x86/msr.h>
 #include <acpi/acpi.h>
 #include <soc/cpu.h>
+#include <soc/msr.h>
 #include <console/console.h>
 #include <arch/bert_storage.h>
 #include <cper.h>