HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43348 )
Change subject: nb/intel/sandybridge/sandybridge.h: Add missing <stdint.h> ......................................................................
nb/intel/sandybridge/sandybridge.h: Add missing <stdint.h>
Replace unused <cpu/intel/model_206ax/model_206ax.h> by missing <stdint.h>.
Change-Id: I9d54d0923a595734a84256ddcafb9dae17615cb0 hange-Id: I05a0a968f39e88aa8e05c8124f6390a943429840 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/sandybridge/sandybridge.h 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/43348/1
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h index 1652b09..fc58352 100644 --- a/src/northbridge/intel/sandybridge/sandybridge.h +++ b/src/northbridge/intel/sandybridge/sandybridge.h @@ -36,7 +36,7 @@
/* Everything below this line is ignored in the DSDT */ #ifndef __ACPI__ -#include <cpu/intel/model_206ax/model_206ax.h> +#include <stdint.h>
/* Chipset types */ enum platform_type {
Hello build bot (Jenkins), Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
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Change subject: nb/intel/sandybridge: Add include ......................................................................
nb/intel/sandybridge: Add include
Change-Id: I9d54d0923a595734a84256ddcafb9dae17615cb0 hange-Id: I05a0a968f39e88aa8e05c8124f6390a943429840 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/sandybridge/common.c M src/northbridge/intel/sandybridge/sandybridge.h 2 files changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/43348/2
Hello build bot (Jenkins), Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#7).
Change subject: nb/intel/sandybridge: Add include ......................................................................
nb/intel/sandybridge: Add include
Change-Id: I9d54d0923a595734a84256ddcafb9dae17615cb0 hange-Id: I05a0a968f39e88aa8e05c8124f6390a943429840 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/sandybridge/common.c M src/northbridge/intel/sandybridge/sandybridge.h 2 files changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/43348/7
Hello build bot (Jenkins), Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#8).
Change subject: nb/intel/sandybridge: Add missing includes ......................................................................
nb/intel/sandybridge: Add missing includes
Change-Id: I9d54d0923a595734a84256ddcafb9dae17615cb0 hange-Id: I05a0a968f39e88aa8e05c8124f6390a943429840 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/sandybridge/chip.h M src/northbridge/intel/sandybridge/common.c M src/northbridge/intel/sandybridge/gma.h M src/northbridge/intel/sandybridge/memmap.c M src/northbridge/intel/sandybridge/raminit.h M src/northbridge/intel/sandybridge/raminit_common.c M src/northbridge/intel/sandybridge/raminit_mrc.c M src/northbridge/intel/sandybridge/raminit_native.c M src/northbridge/intel/sandybridge/raminit_native.h M src/northbridge/intel/sandybridge/raminit_tables.c M src/northbridge/intel/sandybridge/raminit_tables.h M src/northbridge/intel/sandybridge/sandybridge.h 12 files changed, 17 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/43348/8
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43348 )
Change subject: nb/intel/sandybridge: Add missing includes ......................................................................
Patch Set 8:
(15 comments)
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/chip.h:
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 17: u8 stdint
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/common.c:
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 10: get_platform_id model_206ax.h
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/gma.h:
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 10: u32 stdint.h
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/memmap.c:
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 16: uintptr_t stdint.h
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 37: size_t stddef.h
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit.h:
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 10: u8 stdint.h
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit_common.c:
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 35: u8 stdint.h
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 121: size_t stddef.h
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit_mrc.c:
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 49: u16 stdint.h
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 352: size_t stddef.h
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit_native.h:
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 11: u8 stdint.h
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit_native.c:
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 27: u32 stdint.h
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit_tables.h:
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 8: u32 only stdint.h is needed
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit_tables.c:
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 6: u32 stdint.h
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/sandybridge.h:
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 32: u8 stdint.h
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43348 )
Change subject: nb/intel/sandybridge: Add missing includes ......................................................................
Patch Set 8: Code-Review+1
(1 comment)
a
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/memmap.c:
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 13: #include <stddef.h> : #include <stdint.h> Wouldn't it make more sense to include <types.h> instead of two headers?
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43348 )
Change subject: nb/intel/sandybridge: Add missing includes ......................................................................
Patch Set 8:
(1 comment)
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/memmap.c:
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 13: #include <stddef.h> : #include <stdint.h>
Wouldn't it make more sense to include <types. […]
I would use types if more than 2 headers are needed.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43348 )
Change subject: nb/intel/sandybridge: Add missing includes ......................................................................
Patch Set 8: Code-Review-1
(4 comments)
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/chip.h:
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 52: bool stdbool.h
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit_common.c:
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 408: bool stdbool.h
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit_native.h:
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 11: bool stdbool.h
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit_native.c:
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 134: bool stdbool.h
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43348 )
Change subject: nb/intel/sandybridge: Add missing includes ......................................................................
Patch Set 8:
(4 comments)
Thx
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/chip.h:
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 52: bool
stdbool. […]
Done
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit_common.c:
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 408: bool
stdbool. […]
Done
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit_native.h:
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 11: bool
stdbool. […]
Done
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit_native.c:
https://review.coreboot.org/c/coreboot/+/43348/8/src/northbridge/intel/sandy... PS8, Line 134: bool
stdbool. […]
Done
Hello build bot (Jenkins), Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43348
to look at the new patch set (#9).
Change subject: nb/intel/sandybridge: Add missing includes ......................................................................
nb/intel/sandybridge: Add missing includes
Change-Id: I9d54d0923a595734a84256ddcafb9dae17615cb0 hange-Id: I05a0a968f39e88aa8e05c8124f6390a943429840 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/sandybridge/chip.h M src/northbridge/intel/sandybridge/common.c M src/northbridge/intel/sandybridge/gma.h M src/northbridge/intel/sandybridge/memmap.c M src/northbridge/intel/sandybridge/raminit.h M src/northbridge/intel/sandybridge/raminit_common.c M src/northbridge/intel/sandybridge/raminit_mrc.c M src/northbridge/intel/sandybridge/raminit_native.c M src/northbridge/intel/sandybridge/raminit_native.h M src/northbridge/intel/sandybridge/raminit_tables.c M src/northbridge/intel/sandybridge/raminit_tables.h M src/northbridge/intel/sandybridge/sandybridge.h 12 files changed, 19 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/43348/9
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43348 )
Change subject: nb/intel/sandybridge: Add missing includes ......................................................................
Patch Set 9: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/43348/9/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit.h:
https://review.coreboot.org/c/coreboot/+/43348/9/src/northbridge/intel/sandy... PS9, Line 9: struct sys_info { I dropped this in CB:43702
Hello build bot (Jenkins), Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43348
to look at the new patch set (#10).
Change subject: nb/intel/sandybridge: Add missing includes ......................................................................
nb/intel/sandybridge: Add missing includes
Change-Id: I9d54d0923a595734a84256ddcafb9dae17615cb0 hange-Id: I05a0a968f39e88aa8e05c8124f6390a943429840 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/sandybridge/chip.h M src/northbridge/intel/sandybridge/common.c M src/northbridge/intel/sandybridge/gma.h M src/northbridge/intel/sandybridge/memmap.c M src/northbridge/intel/sandybridge/raminit_common.c M src/northbridge/intel/sandybridge/raminit_mrc.c M src/northbridge/intel/sandybridge/raminit_native.c M src/northbridge/intel/sandybridge/raminit_native.h M src/northbridge/intel/sandybridge/raminit_tables.c M src/northbridge/intel/sandybridge/raminit_tables.h M src/northbridge/intel/sandybridge/sandybridge.h 11 files changed, 18 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/43348/10
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43348 )
Change subject: nb/intel/sandybridge: Add missing includes ......................................................................
Patch Set 10:
(1 comment)
https://review.coreboot.org/c/coreboot/+/43348/9/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit.h:
https://review.coreboot.org/c/coreboot/+/43348/9/src/northbridge/intel/sandy... PS9, Line 9: struct sys_info {
I dropped this in CB:43702
Thx
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43348 )
Change subject: nb/intel/sandybridge: Add missing includes ......................................................................
Patch Set 11: Code-Review+1
Waiting for Mr. Jenkins to test the rebased change...
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43348 )
Change subject: nb/intel/sandybridge: Add missing includes ......................................................................
Patch Set 11: Code-Review+2
Hello build bot (Jenkins), Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43348
to look at the new patch set (#12).
Change subject: nb/intel/sandybridge: Add missing includes ......................................................................
nb/intel/sandybridge: Add missing includes
Change-Id: I9d54d0923a595734a84256ddcafb9dae17615cb0 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/sandybridge/chip.h M src/northbridge/intel/sandybridge/common.c M src/northbridge/intel/sandybridge/gma.h M src/northbridge/intel/sandybridge/memmap.c M src/northbridge/intel/sandybridge/raminit_common.c M src/northbridge/intel/sandybridge/raminit_mrc.c M src/northbridge/intel/sandybridge/raminit_native.c M src/northbridge/intel/sandybridge/raminit_native.h M src/northbridge/intel/sandybridge/raminit_tables.c M src/northbridge/intel/sandybridge/raminit_tables.h M src/northbridge/intel/sandybridge/sandybridge.h 11 files changed, 18 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/43348/12
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43348 )
Change subject: nb/intel/sandybridge: Add missing includes ......................................................................
nb/intel/sandybridge: Add missing includes
Change-Id: I9d54d0923a595734a84256ddcafb9dae17615cb0 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/43348 Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/northbridge/intel/sandybridge/chip.h M src/northbridge/intel/sandybridge/common.c M src/northbridge/intel/sandybridge/gma.h M src/northbridge/intel/sandybridge/memmap.c M src/northbridge/intel/sandybridge/raminit_common.c M src/northbridge/intel/sandybridge/raminit_mrc.c M src/northbridge/intel/sandybridge/raminit_native.c M src/northbridge/intel/sandybridge/raminit_native.h M src/northbridge/intel/sandybridge/raminit_tables.c M src/northbridge/intel/sandybridge/raminit_tables.h M src/northbridge/intel/sandybridge/sandybridge.h 11 files changed, 18 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/northbridge/intel/sandybridge/chip.h b/src/northbridge/intel/sandybridge/chip.h index 8f388ec..98baaa2 100644 --- a/src/northbridge/intel/sandybridge/chip.h +++ b/src/northbridge/intel/sandybridge/chip.h @@ -4,6 +4,8 @@ #define NORTHBRIDGE_INTEL_SANDYBRIDGE_CHIP_H
#include <drivers/intel/gma/i915.h> +#include <stdbool.h> +#include <stdint.h>
/* * Digital Port Hotplug Enable: diff --git a/src/northbridge/intel/sandybridge/common.c b/src/northbridge/intel/sandybridge/common.c index b27911d..5cd49cc 100644 --- a/src/northbridge/intel/sandybridge/common.c +++ b/src/northbridge/intel/sandybridge/common.c @@ -2,6 +2,7 @@
#include <console/console.h> #include <device/device.h> +#include <cpu/intel/model_206ax/model_206ax.h> #include "sandybridge.h"
enum platform_type get_platform_type(void) diff --git a/src/northbridge/intel/sandybridge/gma.h b/src/northbridge/intel/sandybridge/gma.h index c15ad53..bbff461 100644 --- a/src/northbridge/intel/sandybridge/gma.h +++ b/src/northbridge/intel/sandybridge/gma.h @@ -3,6 +3,8 @@ #ifndef NORTHBRIDGE_INTEL_SANDYBRIDGE_GMA_H #define NORTHBRIDGE_INTEL_SANDYBRIDGE_GMA_H
+#include <stdint.h> + struct i915_gpu_controller_info;
int i915lightup_sandy(const struct i915_gpu_controller_info *info, u32 physbase, u16 pio, diff --git a/src/northbridge/intel/sandybridge/memmap.c b/src/northbridge/intel/sandybridge/memmap.c index 8da4ec9..b0a5149 100644 --- a/src/northbridge/intel/sandybridge/memmap.c +++ b/src/northbridge/intel/sandybridge/memmap.c @@ -10,6 +10,8 @@ #include <cpu/x86/smm.h> #include <program_loading.h> #include "sandybridge.h" +#include <stddef.h> +#include <stdint.h>
static uintptr_t smm_region_start(void) { diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index 371527e..6588db5 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -9,6 +9,7 @@ #include <northbridge/intel/sandybridge/chip.h> #include <device/pci_def.h> #include <delay.h> +#include <types.h>
#include "raminit_native.h" #include "raminit_common.h" diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c index cea32af..b6b3989 100644 --- a/src/northbridge/intel/sandybridge/raminit_mrc.c +++ b/src/northbridge/intel/sandybridge/raminit_mrc.c @@ -14,6 +14,8 @@ #include <device/pci_def.h> #include <lib.h> #include <mrc_cache.h> +#include <stddef.h> +#include <stdint.h> #include <timestamp.h> #include "raminit.h" #include "pei_data.h" diff --git a/src/northbridge/intel/sandybridge/raminit_native.c b/src/northbridge/intel/sandybridge/raminit_native.c index e95f154..62715a1 100644 --- a/src/northbridge/intel/sandybridge/raminit_native.c +++ b/src/northbridge/intel/sandybridge/raminit_native.c @@ -8,6 +8,9 @@ #include <device/pci_def.h> #include <device/pci_ops.h> #include <northbridge/intel/sandybridge/chip.h> +#include <stdbool.h> +#include <stdint.h> + #include "raminit_native.h" #include "raminit_common.h" #include "raminit_tables.h" diff --git a/src/northbridge/intel/sandybridge/raminit_native.h b/src/northbridge/intel/sandybridge/raminit_native.h index 1bba180..22aea5b 100644 --- a/src/northbridge/intel/sandybridge/raminit_native.h +++ b/src/northbridge/intel/sandybridge/raminit_native.h @@ -5,6 +5,8 @@
#include "sandybridge.h" #include <device/dram/ddr3.h> +#include <stdbool.h> +#include <stdint.h>
/* The order is: ch0dimmA, ch0dimmB, ch1dimmA, ch1dimmB */ void read_spd(spd_raw_data *spd, u8 addr, bool id_only); diff --git a/src/northbridge/intel/sandybridge/raminit_tables.c b/src/northbridge/intel/sandybridge/raminit_tables.c index bd0d117..c3ba9de 100644 --- a/src/northbridge/intel/sandybridge/raminit_tables.c +++ b/src/northbridge/intel/sandybridge/raminit_tables.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <stdint.h> #include "raminit_tables.h"
const u32 frq_refi_map[2][8] = { diff --git a/src/northbridge/intel/sandybridge/raminit_tables.h b/src/northbridge/intel/sandybridge/raminit_tables.h index 99077a4..6bf6a1f 100644 --- a/src/northbridge/intel/sandybridge/raminit_tables.h +++ b/src/northbridge/intel/sandybridge/raminit_tables.h @@ -3,7 +3,7 @@ #ifndef RAMINIT_TABLES_H #define RAMINIT_TABLES_H
-#include <types.h> +#include <stdint.h>
extern const u32 frq_refi_map[2][8];
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h index 4cd833f..264d1e2 100644 --- a/src/northbridge/intel/sandybridge/sandybridge.h +++ b/src/northbridge/intel/sandybridge/sandybridge.h @@ -36,7 +36,7 @@
/* Everything below this line is ignored in the DSDT */ #ifndef __ACPI__ -#include <cpu/intel/model_206ax/model_206ax.h> +#include <stdint.h>
/* Chipset types */ enum platform_type {
-
Angel Pons (Code Review) -
HAOUAS Elyes (Code Review)