Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44367 )
Change subject: soc/intel/skylake: Use PEG defintions from pci_devs.h ......................................................................
soc/intel/skylake: Use PEG defintions from pci_devs.h
Change-Id: I7114deed35f25e74ac508f08e9c85653a7fe39ed Signed-off-by: Felix Singer felixsinger@posteo.net --- M src/soc/intel/skylake/romstage/romstage.c 1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/44367/1
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c index 5d651ca..7410925 100644 --- a/src/soc/intel/skylake/romstage/romstage.c +++ b/src/soc/intel/skylake/romstage/romstage.c @@ -170,7 +170,7 @@ * If PEG port is not defined in the device tree, it will be disabled * in FSP */ - dev = pcidev_on_root(SA_DEV_SLOT_PEG, 0); /* PEG 0:1:0 */ + dev = pcidev_path_on_root(SA_DEVFN_PEG0); /* PEG 0:1:0 */ if (!dev || !dev->enabled) m_cfg->Peg0Enable = 0; else if (dev->enabled) { @@ -185,7 +185,7 @@ m_t_cfg->Peg0Gen3EqPh3Method = 0; }
- dev = pcidev_on_root(SA_DEV_SLOT_PEG, 1); /* PEG 0:1:1 */ + dev = pcidev_path_on_root(SA_DEVFN_PEG1); /* PEG 0:1:1 */ if (!dev || !dev->enabled) m_cfg->Peg1Enable = 0; else if (dev->enabled) { @@ -197,7 +197,7 @@ m_t_cfg->Peg1Gen3EqPh3Method = 0; }
- dev = pcidev_on_root(SA_DEV_SLOT_PEG, 2); /* PEG 0:1:2 */ + dev = pcidev_path_on_root(SA_DEVFN_PEG2); /* PEG 0:1:2 */ if (!dev || !dev->enabled) m_cfg->Peg2Enable = 0; else if (dev->enabled) {
Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44367
to look at the new patch set (#2).
Change subject: soc/intel/skylake: Use PEG defintions from pci_devs.h ......................................................................
soc/intel/skylake: Use PEG defintions from pci_devs.h
Change-Id: I7114deed35f25e74ac508f08e9c85653a7fe39ed Signed-off-by: Felix Singer felixsinger@posteo.net --- M src/soc/intel/skylake/romstage/romstage.c 1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/44367/2
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44367 )
Change subject: soc/intel/skylake: Use PEG defintions from pci_devs.h ......................................................................
Patch Set 2: Code-Review+2
Hello build bot (Jenkins), Michael Niewöhner, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44367
to look at the new patch set (#4).
Change subject: soc/intel/skylake: Use PEG definitions from pci_devs.h ......................................................................
soc/intel/skylake: Use PEG definitions from pci_devs.h
Change-Id: I7114deed35f25e74ac508f08e9c85653a7fe39ed Signed-off-by: Felix Singer felixsinger@posteo.net --- M src/soc/intel/skylake/romstage/romstage.c 1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/44367/4
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44367 )
Change subject: soc/intel/skylake: Use PEG definitions from pci_devs.h ......................................................................
Patch Set 5: Code-Review+2
Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44367 )
Change subject: soc/intel/skylake: Use PEG definitions from pci_devs.h ......................................................................
soc/intel/skylake: Use PEG definitions from pci_devs.h
Change-Id: I7114deed35f25e74ac508f08e9c85653a7fe39ed Signed-off-by: Felix Singer felixsinger@posteo.net Reviewed-on: https://review.coreboot.org/c/coreboot/+/44367 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Michael Niewöhner --- M src/soc/intel/skylake/romstage/romstage.c 1 file changed, 3 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Michael Niewöhner: Looks good to me, approved
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c index 5d651ca..7410925 100644 --- a/src/soc/intel/skylake/romstage/romstage.c +++ b/src/soc/intel/skylake/romstage/romstage.c @@ -170,7 +170,7 @@ * If PEG port is not defined in the device tree, it will be disabled * in FSP */ - dev = pcidev_on_root(SA_DEV_SLOT_PEG, 0); /* PEG 0:1:0 */ + dev = pcidev_path_on_root(SA_DEVFN_PEG0); /* PEG 0:1:0 */ if (!dev || !dev->enabled) m_cfg->Peg0Enable = 0; else if (dev->enabled) { @@ -185,7 +185,7 @@ m_t_cfg->Peg0Gen3EqPh3Method = 0; }
- dev = pcidev_on_root(SA_DEV_SLOT_PEG, 1); /* PEG 0:1:1 */ + dev = pcidev_path_on_root(SA_DEVFN_PEG1); /* PEG 0:1:1 */ if (!dev || !dev->enabled) m_cfg->Peg1Enable = 0; else if (dev->enabled) { @@ -197,7 +197,7 @@ m_t_cfg->Peg1Gen3EqPh3Method = 0; }
- dev = pcidev_on_root(SA_DEV_SLOT_PEG, 2); /* PEG 0:1:2 */ + dev = pcidev_path_on_root(SA_DEVFN_PEG2); /* PEG 0:1:2 */ if (!dev || !dev->enabled) m_cfg->Peg2Enable = 0; else if (dev->enabled) {
-
Felix Singer (Code Review) -
Michael Niewöhner (Code Review)