[XS] Change in coreboot[main]: soc/mediatek/common: Correct src clk frq to 400 MHz for eMMMC clk of ...

[Yu-Ping Wu (Code Review)]

Attention is currently required from: Hung-Te Lin, Kiwi Liu, Mengqi Zhang, Paul Menzel, Yidi Lin.

Yu-Ping Wu has posted comments on this change by Kiwi Liu. ( https://review.coreboot.org/c/coreboot/+/84298?usp=email )

Change subject: soc/mediatek/common: Correct src clk frq to 400 MHz for eMMMC clk of 400 kHz
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Patch Set 15:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/84298/comment/76326f5f_129960dd?usp... :
PS15, Line 7: Correct src clk frq to 400 MHz for eMMMC clk
            : of 400 kHz
Looks like it's too long. How about `Correct eMMC src clk frequency to 400 MHz`?

File src/soc/mediatek/common/msdc.c:

https://review.coreboot.org/c/coreboot/+/84298/comment/bdac5a6a_2a7efa52?usp... :
PS15, Line 432: 400 * 1000 * 1000
400 * MHz