Change in coreboot[master]: soc/intel/alderlake: Enable CPPCv3 - coreboot-gerrit

3 Dec 2021


      Attention is currently required from: Paul Menzel, Sridhar Siricilla, Patrick Rudolph.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59363 )
Change subject: soc/intel/alderlake: Enable CPPCv3
......................................................................
Patch Set 7:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59363/comment/8d46a37d_2aedec5a 
PS5, Line 7:  for Intel Alderlake
...
Remove as it’s in the prefix.
Done
https://review.coreboot.org/c/coreboot/+/59363/comment/ceb324f4_31aa023d 
PS5, Line 9: Alderlake
...
Alder Lake
Done
Commit Message:
https://review.coreboot.org/c/coreboot/+/59363/comment/e31681b2_f2de0b3d 
PS7, Line 12: OS patches
link to the patches?
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Icaacd4a4ba953d8337f557903ed2ea9da4a60fb9
Gerrit-Change-Number: 59363
Gerrit-PatchSet: 7
Gerrit-Owner: Sridhar Siricilla sridhar.siricilla@intel.com
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: Tim Wawrzynczak twawrzynczak@chromium.org
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
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