[XL] Change in coreboot[main]: soc/intel/snowridge: Add support for Intel Atom Snow Ridge SoC

[Shuo Liu (Code Review)]

Attention is currently required from: Elyes Haouas, Felix Singer, Jérémy Compostella, Vasiliy Khoruzhick, [e-mail].

Shuo Liu has posted comments on this change by [e-mail]. ( https://review.coreboot.org/c/coreboot/+/83321?usp=email )

Change subject: soc/intel/snowridge: Add support for Intel Atom Snow Ridge SoC
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Patch Set 15:

(3 comments)

File src/soc/intel/snowridge/bootblock/early_uart_init.c:

https://review.coreboot.org/c/coreboot/+/83321/comment/88fa76f5_d2d8d7f0?usp... :
PS15, Line 11: static void pci_early_hsuart_device_probe(uint8_t bus, uint8_t dev, uint8_t func,
probe -> enable?

https://review.coreboot.org/c/coreboot/+/83321/comment/4fc9ffd6_eb7c2b76?usp... :
PS15, Line 43: 	write32p(reg32 + UCMR_OFFSET, read32p(reg32 + UCMR_OFFSET) * HIGH_SPEED_CLK_MULT);
reg32 -> iobase?

File src/soc/intel/snowridge/sriov.c:

https://review.coreboot.org/c/coreboot/+/83321/comment/98dc3a65_be684369?usp... :
PS15, Line 95: 		if (resource->size >= 16 * MiB)
suppose this is the special req of a PF?