[M] Change in coreboot[master]: soc/intel/common/block/oc_wdt: Add OC watchdog common block

[Michał Żygowski (Code Review)]

Attention is currently required from: Angel Pons, Arthur Heymans, Benjamin Doron, Himanshu Sahdev, Martin L Roth, Michał Kopeć, Nico Huber, Werner Zeh.

Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68944?usp=email )

Change subject: soc/intel/common/block/oc_wdt: Add OC watchdog common block
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Patch Set 17:

(4 comments)

File src/soc/intel/common/block/oc_wdt/Kconfig:

https://review.coreboot.org/c/coreboot/+/68944/comment/ac903fbd_ec716dc4 :
PS16, Line 7: config SOC_INTEL_COMMON_OC_WDT_ENABLE
> I agree with Michał. It's also common to have one Kconfig to express SoC support […]

Ping

https://review.coreboot.org/c/coreboot/+/68944/comment/84f6abaf_155cb935 :
PS16, Line 21: 	default 90
> LGTM. […]

I have made the default high-enough to pass 128GB DDR5 memory to pass the training (even twice the time it needs, 128GB of DDR5 memory on ADL-S platform took around 5 minutes). Now SoCs can override the default per SoC needs, as the value is no longer exposed in the menuconfig.

File src/soc/intel/common/block/oc_wdt/oc_wdt.c:

https://review.coreboot.org/c/coreboot/+/68944/comment/0df1a0f0_afa17954 :
PS17, Line 19:
> /* timeout - Time in seconds before WDT times out. […]

Added a comment in code.

https://review.coreboot.org/c/coreboot/+/68944/comment/1568d276_746bdd8d :
PS17, Line 61:
> /* Returns time in seconds */

Added a comment in code.