Attention is currently required from: Cliff Huang, Kapil Porwal, Pranava Y N.
Paul Menzel has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84297?usp=email )
Change subject: soc/intel/ptl: Add GPE1 defines ......................................................................
Patch Set 9:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/84297/comment/5908610b_9ffc0b15?usp... : PS9, Line 7: Add GPE1 defines Maybe:
Define GPE1 macros
https://review.coreboot.org/c/coreboot/+/84297/comment/761fda57_3c4a1b40?usp... : PS9, Line 9: defines for GPE number for additional STD GPE0 in PTL : defines for GPE number for GPE1 : defines for GPE1 bits Please elaborate more before this is submitted.
https://review.coreboot.org/c/coreboot/+/84297/comment/44490cb4_42ad4738?usp... : PS9, Line 12: STD standard?
https://review.coreboot.org/c/coreboot/+/84297/comment/b7466cd9_785a149e?usp... : PS9, Line 12: NOTE: All GEP1 bits are STD GPE bits. Shouldn’t this then go into some common directory?