Change in coreboot[master]: soc/intel/broadwell/cpu/acpi.h: Use `get_pmbase()`

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46911 )

Change subject: soc/intel/broadwell/cpu/acpi.h: Use `get_pmbase()`
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soc/intel/broadwell/cpu/acpi.h: Use `get_pmbase()`

This is merely for alignment with Haswell.

Change-Id: Ib758b565703a2e5ddc905d1e19a5be49668c02cb
Signed-off-by: Angel Pons 
---
M src/soc/intel/broadwell/cpu/acpi.c
1 file changed, 1 insertion(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/46911/1

diff --git a/src/soc/intel/broadwell/cpu/acpi.c b/src/soc/intel/broadwell/cpu/acpi.c
index a12fd0e..0e167db 100644
--- a/src/soc/intel/broadwell/cpu/acpi.c
+++ b/src/soc/intel/broadwell/cpu/acpi.c
@@ -16,7 +16,6 @@
 #include <cpu/intel/turbo.h>
 #include <ec/google/chromeec/ec.h>
 #include <vendorcode/google/chromeos/gnvs.h>
-#include <soc/intel/broadwell/memmap.h>
 #include <soc/intel/broadwell/pch/pm.h>
 #include <soc/intel/broadwell/chip.h>

@@ -348,7 +347,7 @@

void generate_cpu_entries(const struct device *device)
 {
-	int coreID, cpuID, pcontrol_blk = ACPI_BASE_ADDRESS, plen = 6;
+	int coreID, cpuID, pcontrol_blk = get_pmbase(), plen = 6;
    int totalcores = dev_count_cpu();
    int cores_per_package = get_cores_per_package();
    int numcpus = totalcores/cores_per_package;

[Angel Pons (Code Review)]

Angel Pons has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/46911 )

Change subject: soc/intel/broadwell/cpu/acpi.h: Use `get_pmbase()`
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Abandoned

Scrapped