[XS] Change in coreboot[main]: mb/starlabs/starbook/rpl: Disconnect SCI/SMI GPIOs

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83624?usp=email )

Change subject: mb/starlabs/starbook/rpl: Disconnect SCI/SMI GPIOs
......................................................................

mb/starlabs/starbook/rpl: Disconnect SCI/SMI GPIOs

The platform uses eSPI so these are not needed.

Change-Id: I81470658263f4b601c9964ff5bed86b22d24df3b
Signed-off-by: Sean Rhodes 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83624
Reviewed-by: Matt DeVillier 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/starlabs/starbook/variants/rpl/gpio.c
1 file changed, 2 insertions(+), 2 deletions(-)

Approvals:
  Matt DeVillier: Looks good to me, approved
  build bot (Jenkins): Verified

diff --git a/src/mainboard/starlabs/starbook/variants/rpl/gpio.c b/src/mainboard/starlabs/starbook/variants/rpl/gpio.c
index 8572b09..996d16b 100644
--- a/src/mainboard/starlabs/starbook/variants/rpl/gpio.c
+++ b/src/mainboard/starlabs/starbook/variants/rpl/gpio.c
@@ -53,7 +53,7 @@
    /* A6:		Not Connected					*/
    PAD_NC(GPP_A6, NONE),
    /* A7:		Embedded Controller SCI				*/
-	PAD_CFG_GPI_SCI_LOW(GPP_A7, NONE, PLTRST, LEVEL),
+	PAD_NC(GPP_A7, NONE),
    /* A8:		Not Connected					*/
    PAD_NC(GPP_A8, NONE),
    /* A9:		ESPI Clock					*/
@@ -254,7 +254,7 @@
    			High:	Enabled				*/
    PAD_CFG_GPO(GPP_E6, 0, DEEP),
    /* E7:		Embedded Controller SMI				*/
-	PAD_CFG_GPI_SMI_LOW(GPP_E7, NONE, DEEP, EDGE_SINGLE),
+	PAD_NC(GPP_E7, NONE),
    /* E8:		DRAM Sleep					*/
    PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
    /* E9:		USB OverCurrent 0				*/