build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39346 )
Change subject: soc/intel/tigerlake: Add processor power limits control support
......................................................................
Patch Set 13:
(6 comments)
https://review.coreboot.org/c/coreboot/+/39346/13/src/soc/intel/apollolake/c...
File src/soc/intel/apollolake/chip.h:
https://review.coreboot.org/c/coreboot/+/39346/13/src/soc/intel/apollolake/c...
PS13, Line 120: uint32_t tdp_psyspl2;
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https://review.coreboot.org/c/coreboot/+/39346/13/src/soc/intel/apollolake/c...
PS13, Line 122: uint32_t tdp_psyspl3;
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https://review.coreboot.org/c/coreboot/+/39346/13/src/soc/intel/apollolake/c...
PS13, Line 124: uint32_t tdp_psyspl3_time;
please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/39346/13/src/soc/intel/apollolake/c...
PS13, Line 126: uint32_t tdp_psyspl3_dutycycle;
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https://review.coreboot.org/c/coreboot/+/39346/13/src/soc/intel/apollolake/c...
PS13, Line 128: uint32_t tdp_pl4;
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https://review.coreboot.org/c/coreboot/+/39346/13/src/soc/intel/apollolake/c...
PS13, Line 130: uint16_t psys_pmax;
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I41fd95949aa2b02828aa2d13d29b962cb579904a
Gerrit-Change-Number: 39346
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