Hello build bot (Jenkins), Furquan Shaikh, Martin Roth, Marshall Dawson, Chris Wang,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44135
to look at the new patch set (#3).
Change subject: mb/google/zork: C-state IO base address alignment ......................................................................
mb/google/zork: C-state IO base address alignment
Align the C-state MSR value of BSP with AGESA.
BUG=b:162705221 BRANCH=none TEST=Check the MSR value is correct and BSP can enter CC6 with AVT tool
Signed-off-by: Chris Wang chris.wang@amd.corp-partner.google.com Change-Id: Ib98d34af518439d338326446c20601867ad31690 --- M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/include/soc/iomap.h 2 files changed, 7 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/44135/3