Jamie Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38432 )
Change subject: soc/intel/cannonlake: Add chip config for SATA strength ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38432/2/src/soc/intel/cannonlake/ch... File src/soc/intel/cannonlake/chip.h:
https://review.coreboot.org/c/coreboot/+/38432/2/src/soc/intel/cannonlake/ch... PS2, Line 395: uint8_t PchSataHsioRxGen3EqBoostMagEnable[SOC_INTEL_CML_SATA_DEV_MAX]; : uint8_t PchSataHsioRxGen3EqBoostMag[SOC_INTEL_CML_SATA_DEV_MAX]; : uint8_t PchSataHsioTxGen3DownscaleAmpEnable[SOC_INTEL_CML_SATA_DEV_MAX]; : uint8_t PchSataHsioTxGen3DownscaleAmp[SOC_INTEL_CML_SATA_DEV_MAX]; : uint8_t PchSataHsioTxGen3DeEmphEnable[SOC_INTEL_CML_SATA_DEV_MAX]; : uint8_t PchSataHsioTxGen3DeEmph[SOC_INTEL_CML_SATA_DEV_MAX];
Just a suggestion to make a struct out of this, then all the settings for one SATA device are togeth […]
Done