[coreboot-gerrit] Change in coreboot[master]: arch/x86: Reserve some CAR memory for FSP single stack requirement

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35165 )

Change subject: arch/x86: Reserve some CAR memory for FSP single stack requirement
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Patch Set 9:

(2 comments)

https://review.coreboot.org/c/coreboot/+/35165/9/src/arch/x86/car.ld 
File src/arch/x86/car.ld:

https://review.coreboot.org/c/coreboot/+/35165/9/src/arch/x86/car.ld@94 
PS9, Line 94: #if CONFIG(FSP_USES_CB_STACK)
> Why define this for bootblock and verstage, when you only need it for romstage and it can change loc […]

if reviewers say we need to guard with ENV_ROMSTAGE then we could do that.

https://review.coreboot.org/c/coreboot/+/35165/9/src/drivers/intel/fsp2_0/Kc... 
File src/drivers/intel/fsp2_0/Kconfig:

https://review.coreboot.org/c/coreboot/+/35165/9/src/drivers/intel/fsp2_0/Kc... 
PS9, Line 209: 	default 0x10000
> Your previous comment Sep 03 09:05 […]

we had a sync with FSP team and finalize heap = 0x10000 and stack = 0x20000 for now on all FSP2.1 design and will get back on future soc if this requiremtn doesn't meet there.

The same will be documented. Not sure where you see the gap. commit msg has been updated with the expectation.