Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2977
-gerrit
commit a75e92dd9647f177b134e1818006cbec28395fd8 Author: Aaron Durbin adurbin@chromium.org Date: Wed Mar 27 20:57:28 2013 -0500
lynxpoint: split clearing and enabling of smm
Previously southbridge_smm_init() was provided that did both the clearing of the SMM state and enabling SMIs. This is troublesome in how haswell machines bring up the APs. The BSP enters SMM once to determine if parallel SMM relocation is possible. If it is possible the BSP releases the APs to do SMM relocation. Normally, after the APs complete the SMM relocation, the BSP would then re-enter the relocation handler to relocate its own SMM space. However, because SMIs were previously enabled it is possible for an SMI event to occur before the APs are complete or have entered the relocation handler. This is bad because the BSP will turn off parallel SMM save state. Additionally, this is a problem because the relocation handler is not written to handle regular SMIs which can cause an SMI storm which effectively looks like a hung machine. Correct these issues by turning on SMIs after all the SMM relocation has occurred.
Change-Id: Id4f07553b110b9664d51d2e670a14e6617591500 Signed-off-by: Aaron Durbin adurbin@chromium.org --- src/cpu/intel/haswell/smmrelocate.c | 7 ++++++- src/southbridge/intel/lynxpoint/pch.h | 6 +++++- src/southbridge/intel/lynxpoint/smi.c | 6 +++++- 3 files changed, 16 insertions(+), 3 deletions(-)
diff --git a/src/cpu/intel/haswell/smmrelocate.c b/src/cpu/intel/haswell/smmrelocate.c index 65ac363..a8ab841 100644 --- a/src/cpu/intel/haswell/smmrelocate.c +++ b/src/cpu/intel/haswell/smmrelocate.c @@ -396,7 +396,8 @@ int smm_initialize(void) if (cpu_smm_setup()) return -1;
- southbridge_smm_init(); + /* Clear the SMM state in the southbridge. */ + southbridge_smm_clear_state();
/* Run the relocation handler. */ smm_initiate_relocation(); @@ -412,6 +413,10 @@ int smm_initialize(void) release_aps_for_smm_relocation(0); }
+ /* Now that all APs have been relocated as well as the BSP let SMIs + * start flowing. */ + southbridge_smm_enable_smi(); + /* Lock down the SMRAM space. */ smm_lock();
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h index 76672bc..a48e0a4 100644 --- a/src/southbridge/intel/lynxpoint/pch.h +++ b/src/southbridge/intel/lynxpoint/pch.h @@ -170,9 +170,13 @@ void pch_log_state(void); void acpi_create_intel_hpet(acpi_hpet_t * hpet);
/* These helpers are for performing SMM relocation. */ -void southbridge_smm_init(void); void southbridge_trigger_smi(void); void southbridge_clear_smi_status(void); +/* The initialization of the southbridge is split into 2 compoments. One is + * for clearing the state in the SMM registers. The other is for enabling + * SMIs. They are split so that other work between the 2 actions. */ +void southbridge_smm_clear_state(void); +void southbridge_smm_enable_smi(void); #else void enable_smbus(void); void enable_usb_bar(void); diff --git a/src/southbridge/intel/lynxpoint/smi.c b/src/southbridge/intel/lynxpoint/smi.c index 176d400..75c3e66 100644 --- a/src/southbridge/intel/lynxpoint/smi.c +++ b/src/southbridge/intel/lynxpoint/smi.c @@ -30,7 +30,7 @@ #include <string.h> #include "pch.h"
-void southbridge_smm_init(void) +void southbridge_smm_clear_state(void) { u32 smi_en;
@@ -54,7 +54,11 @@ void southbridge_smm_init(void) clear_pm1_status(); clear_tco_status(); clear_gpe_status(); +}
+void southbridge_smm_enable_smi(void) +{ + printk(BIOS_DEBUG, "Enabling SMIs.\n"); /* Configure events */ enable_pm1(PWRBTN_EN | GBL_EN); disable_gpe(PME_B0_EN);