Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39111 )
Change subject: soc/intel/tigerlake: Add Jasper lake GPIO support ......................................................................
Patch Set 17:
(3 comments)
https://review.coreboot.org/c/coreboot/+/39111/17/src/soc/intel/tigerlake/in... File src/soc/intel/tigerlake/include/soc/gpio.h:
https://review.coreboot.org/c/coreboot/+/39111/17/src/soc/intel/tigerlake/in... PS17, Line 40: 6 Why 6?
https://review.coreboot.org/c/coreboot/+/39111/17/src/soc/intel/tigerlake/in... File src/soc/intel/tigerlake/include/soc/gpio_soc_defs_jsl.h:
https://review.coreboot.org/c/coreboot/+/39111/17/src/soc/intel/tigerlake/in... PS17, Line 25: 0x9 nit: Arrange these in numeric order?
https://review.coreboot.org/c/coreboot/+/39111/15/src/soc/intel/tigerlake/in... File src/soc/intel/tigerlake/include/soc/pmc.h:
https://review.coreboot.org/c/coreboot/+/39111/15/src/soc/intel/tigerlake/in... PS15, Line 135: #define PMC_GPP_B 0x1 : #define PMC_GPP_A 0x0 : #define PMC_GPP_R 0x4 : #define PMC_GPP_S 0x6 : #define PMC_GPD 0x3 : #define PMC_GPP_H 0xA : #define PMC_GPP_D 0x7 : #define PMC_GPP_F 0x2 : #define PMC_GPP_C 0x8 : #define PMC_GPP_E 0xF
Ack
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