Ravi kumar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47284 )
Change subject: sc7280: support bitbang UART w/gpio ......................................................................
sc7280: support bitbang UART w/gpio
Change-Id: Ic6c70f917a59e233f6ea518d9c39f73fe84991c3 Signed-off-by: Ravi Kumar Bokka rbokka@codeaurora.org --- M src/soc/qualcomm/sc7280/Kconfig M src/soc/qualcomm/sc7280/Makefile.inc A src/soc/qualcomm/sc7280/uart_bitbang.c 3 files changed, 56 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/47284/1
diff --git a/src/soc/qualcomm/sc7280/Kconfig b/src/soc/qualcomm/sc7280/Kconfig index fc2f34b..ed611e8 100644 --- a/src/soc/qualcomm/sc7280/Kconfig +++ b/src/soc/qualcomm/sc7280/Kconfig @@ -11,6 +11,9 @@ select HAVE_MONOTONIC_TIMER select ARM64_USE_ARCH_TIMER select SOC_QUALCOMM_COMMON + select CACHE_MRC_SETTINGS + select HAVE_UART_SPECIAL + select BOOTBLOCK_CONSOLE
if SOC_QUALCOMM_SC7280
diff --git a/src/soc/qualcomm/sc7280/Makefile.inc b/src/soc/qualcomm/sc7280/Makefile.inc index 6d07629..3112141 100644 --- a/src/soc/qualcomm/sc7280/Makefile.inc +++ b/src/soc/qualcomm/sc7280/Makefile.inc @@ -6,10 +6,18 @@ bootblock-y += mmu.c bootblock-y += timer.c bootblock-y += spi.c +bootblock-$(CONFIG_SC7280_QSPI) += qspi.c +bootblock-y += clock.c +bootblock-y += gpio.c +bootblock-$(CONFIG_DRIVERS_UART) += uart_bitbang.c
################################################################################ verstage-y += timer.c verstage-y += spi.c +verstage-$(CONFIG_SC7280_QSPI) += qspi.c +verstage-y += clock.c +verstage-y += gpio.c +verstage-$(CONFIG_DRIVERS_UART) += uart_bitbang.c
################################################################################ romstage-y += cbmem.c @@ -19,12 +27,20 @@ romstage-y += ../common/mmu.c romstage-y += mmu.c romstage-y += spi.c +romstage-$(CONFIG_SC7280_QSPI) += qspi.c +romstage-y += clock.c +romstage-y += gpio.c +romstage-$(CONFIG_DRIVERS_UART) += uart_bitbang.c
################################################################################ ramstage-y += soc.c ramstage-y += cbmem.c ramstage-y += timer.c ramstage-y += spi.c +ramstage-$(CONFIG_SC7280_QSPI) += qspi.c +ramstage-y += clock.c +ramstage-y += gpio.c +ramstage-$(CONFIG_DRIVERS_UART) += uart_bitbang.c
################################################################################
diff --git a/src/soc/qualcomm/sc7280/uart_bitbang.c b/src/soc/qualcomm/sc7280/uart_bitbang.c new file mode 100644 index 0000000..7d88a20 --- /dev/null +++ b/src/soc/qualcomm/sc7280/uart_bitbang.c @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/uart.h> +#include <gpio.h> +#include <boot/coreboot_tables.h> + +#define UART_TX_PIN GPIO(44) + +void uart_fill_lb(void *data) +{ + +} + +static void set_tx(int line_state) +{ + gpio_set(UART_TX_PIN, line_state); +} + +void uart_init(unsigned int idx) +{ + gpio_output(UART_TX_PIN, 1); +} + +void uart_tx_byte(unsigned int idx, unsigned char data) +{ + uart_bitbang_tx_byte(data, set_tx); +} + +void uart_tx_flush(unsigned int idx) +{ + /* unnecessary, PIO Tx means transaction is over when tx_byte returns */ +} + +unsigned char uart_rx_byte(unsigned int idx) +{ + return 0; /* not implemented */ +}