Dhaval Sharma has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29775 )
Change subject: SMI: Introduce CONFIG_SOC_INTEL_BYPASS_PORT_B2_SMI ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/29775/1/src/ec/google/chromeec/smihandler.c File src/ec/google/chromeec/smihandler.c:
https://review.coreboot.org/#/c/29775/1/src/ec/google/chromeec/smihandler.c@... PS1, Line 102: #if IS_ENABLED(CONFIG_SOC_INTEL_BYPASS_PORT_B2_SMI) one alternative way to achieve this is https://review.coreboot.org/#/c/coreboot/+/28696/2/src/soc/intel/skylake/acp.... In that case you can leave these hooks as is; just ensure that while filling up ACPI table you don't provide port B2 entry. Making it 0 causes OS to know that SMI is not supported.