[coreboot-gerrit] Change in coreboot[master]: WIP: soc/mediatek/mt8192: update initial setting of mt6359

[hsin-hsiung wang (Code Review)]

hsin-hsiung wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/49005 )

Change subject: WIP: soc/mediatek/mt8192: update initial setting of mt6359
......................................................................

WIP: soc/mediatek/mt8192: update initial setting of mt6359

Disable RG_PH2_off because vcore is unused.
Otherwise, the current of vgpu will be abnormal.

BRANCH=none
TEST=boot asurada correctly

Signed-off-by: Hsin-Hsiung Wang 
Change-Id: I48d3729302de9e3343dce79fe6f5ed045d0296a5
---
M src/soc/mediatek/mt8192/mt6359p.c
1 file changed, 1 insertion(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/49005/1

diff --git a/src/soc/mediatek/mt8192/mt6359p.c b/src/soc/mediatek/mt8192/mt6359p.c
index a8e93ca..6ad162a 100644
--- a/src/soc/mediatek/mt8192/mt6359p.c
+++ b/src/soc/mediatek/mt8192/mt6359p.c
@@ -90,6 +90,7 @@
    {0x19AE, 0x6E, 0x7E, 0},
    {0x19B0, 0x3C00, 0x3C00, 0},
    {0x19B4, 0x20FD, 0xFFFF, 0},
+	{0x19DE, 0x1, 0x1, 6},
    {0x1A08, 0x4200, 0x4680, 0},
    {0x1A0A, 0x6E, 0x7E, 0},
    {0x1A0C, 0x3C00, 0x3C00, 0},