Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36914 )
Change subject: binaryPI: implement C bootblock ......................................................................
Patch Set 17:
(2 comments)
I think we can make this more review-friendly, let me try something.
https://review.coreboot.org/c/coreboot/+/36914/17/src/drivers/amd/agesa/boot... File src/drivers/amd/agesa/bootblock.c:
https://review.coreboot.org/c/coreboot/+/36914/17/src/drivers/amd/agesa/boot... PS17, Line 25: /* TSC cannot be relied upon. Override the TSC value passed in. */ Not sure if this comment is true. At least for fam14 TSC rescales during raminit. But timestamp_get() here is just another rdtsc call now. So you might as well pass base_timestamp below.
https://review.coreboot.org/c/coreboot/+/36914/17/src/drivers/amd/agesa/cach... File src/drivers/amd/agesa/cache_as_ram.S:
https://review.coreboot.org/c/coreboot/+/36914/17/src/drivers/amd/agesa/cach... PS17, Line 39: /* Turn on OSFXSR [BIT9] and OSXMMEXCPT [BIT10] onto CR4 register */ Needless whitespace change,