Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69226 )
Change subject: lib: Add LPDDR5x DRAM type ......................................................................
lib: Add LPDDR5x DRAM type
BUG=none TEST=Able to build and boot Google, Rex SKU2 (Micron LPDDR5x MT62F1G32D2DS-026).
Without this code change: [INFO ] SPD: module type is UNKNOWN
With this code change: [INFO ] SPD: module type is LPDDR5X
Signed-off-by: Subrata Banik subratabanik@google.com Change-Id: If620cf51133ca295fd3f1cbecbb472beb337b9fc Reviewed-on: https://review.coreboot.org/c/coreboot/+/69226 Reviewed-by: Tarun Tuli taruntuli@google.com Reviewed-by: Arthur Heymans arthur@aheymans.xyz Reviewed-by: Eric Lai eric_lai@quanta.corp-partner.google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/include/spd_bin.h M src/lib/spd_bin.c 2 files changed, 28 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved Eric Lai: Looks good to me, approved Tarun Tuli: Looks good to me, approved
diff --git a/src/include/spd_bin.h b/src/include/spd_bin.h index 973eb49..d0cdefc 100644 --- a/src/include/spd_bin.h +++ b/src/include/spd_bin.h @@ -19,6 +19,7 @@ #define SPD_DRAM_LPDDR4X 0x11 #define SPD_DRAM_DDR5 0x12 #define SPD_DRAM_LPDDR5 0x13 +#define SPD_DRAM_LPDDR5X 0x15 #define SPD_DENSITY_BANKS 4 #define SPD_ADDRESSING 5 #define SPD_SN_LEN 4 diff --git a/src/lib/spd_bin.c b/src/lib/spd_bin.c index 0aaaee6..e005ccb 100644 --- a/src/lib/spd_bin.c +++ b/src/lib/spd_bin.c @@ -63,6 +63,8 @@ return "DDR5"; case SPD_DRAM_LPDDR5: return "LPDDR5"; + case SPD_DRAM_LPDDR5X: + return "LPDDR5X"; } return "UNKNOWN"; }